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OCTOBER 2018 I DESIGN007 MAGAZINE 49 layer. This is automatically derived from the IV curves of the Spartan 6 IBIS model by the iCD Termination Planner. Figure 4 illustrates the ringing (red) in an unmatched transmission line. This ringing, which is also represented by over/undershoot (right), is dramatically reduced by terminating the transmission line with an 18.7-ohm series resistor (blue). Controlling the impedance of the transmission lines ensures that your prod- uct will perform more reliably and exhibit improved signal quality and reduced crosstalk and electromagnetic radiation. III. Floor Plan the Placement Based on Connec- tivity: Place components by functionality and analog and digital groups to minimize interaction between different logic fami- lies and improve routability and timing. Since aggressor signals induce cross- talk onto the victim signal, the higher the aggressor voltage, the more cross- talk will be induced. Therefore, it is best to segregate groups of nets according to their signal amplitude. This strategy pre- vents higher voltage nets (e.g., 3.3 V) from affecting lower voltage nets (e.g., 1.5 V), which have lower noise margins. It is also preferable to partition these groups by rise time and frequency. Posi- tion the fastest devices closest to the connector (Figure 5). The placement should be graduated in descending order of speed down to the analog sections far- thest from the connector to avoid noise cou- pling into sensitive devices. All analog signals should be routed in the analog section and all the digital signals in the digital section. Of course, control signals must route between them. The segregation method, which I have used for many years, is to employ route fences or keep-outs. Route fences can be defined by placing elongated keep-outs on all layers. They are placed to direct the routing. No signal can cross these fences on any layer. It is essential to keep in mind that high- speed return currents follow the path of least inductance. For example, if a trace is routed from the digital-to-analog converter (DAC) to Figure 4: Ringing is reduced dramatically by adding a series terminator (simulated in HyperLynx). Figure 5: Components are segregated by logic groups and functionality.