Design007 Magazine


Issue link:

Contents of this Issue


Page 31 of 81

32 DESIGN007 MAGAZINE I FEBRUARY 2019 Thermosetting Prepregs Pros • Possible to match resin system and electrical properties of thermosetting laminates with an E r of 2.95 and above • Superior CTE to thermoplastic bond films • Can be desmeared and typically etched back Cons • Anisotropic material • Not available with an E r ≤ 2.94 • Traditionally higher loss than thermoplastic resin systems Fusion Bonding Pros • Best electrical performance • E r is almost perfectly matched to adjacent laminate materials • May be sequentially laminated depending on copper thickness Cons • Not typically suited for bonding plated subassemblies unless PTFE bond-ply is used • Long lamination cycle • Extremely high lamination temperature required ≥700°F (371°C) • Not compatible with thermosetting resin systems Conclusion As you can see, each of the discussed micro- wave bonding methods has distinct advantages and disadvantages that must be considered when choosing which method will be the right one for a specific application. PCB designers need to fully understand these characteristics to balance cost and performance when select- ing the optimum bonding method. DESIGN007 Visit I-007eBooks to download your copies of American Standard Circuits' books today: The Printed Circuit Designer's Guide to… Fun- damentals of RF/Microwave PCBs and Flex and Rigid-Flex. Anaya Vardya is president and CEO of American Standard Circuits. John Bushie is ASC's application engineering manager and a process engineering specialist. To read past columns or contact the authors, click here. Scientists at Oak Ridge National Laboratory and Hypres, a digital superconductor company, have tested a novel cryogenic—or low-temperature—memory cell circuit design that may boost memory storage while using less energy in future exascale and quantum computing applications. The team used Josephson junctions m a d e f ro m n i o b i u m - a n d a l u m i n u m - based materials fabricated at Hypres for the single-bit memory design on a chip and demonstrated write, read, and reset memory operations occurring on the same circuit. "The test showed the viability of memory processing functions to operate faster and more efficiently," said Yehuda Braiman, a distinguished scientist in the computer science and mathematics division at ORNL. "This could lead to substantially decreased access energies and times and allow for more circuits to occupy less space." Building on an initial design, ORNL's Braiman, Niketh Nair, and Neena Imam continue working on multi-valued mem- ory cell circuits and large arrays of mem- ory cells. Their first step was a ternary memory cell circuit design. (Source: Oak Ridge National Laboratory) Circuit Design May Boost Memory Storage

Articles in this issue

Links on this page

Archives of this issue

view archives of Design007 Magazine - Design007-Feb2019