Design007 Magazine

Design007-Feb2019

Issue link: https://iconnect007.uberflip.com/i/1085192

Contents of this Issue

Navigation

Page 49 of 81

50 DESIGN007 MAGAZINE I FEBRUARY 2019 on digital pins. If you are relying on manual oversight to discover these issues before pro- duction, it's easy to lose track of individual connections, especially on a complex board design with hundreds of vias. Best Practices for Managing Mixed-signal Output For simpler designs, when you need to assign one or more power nets to a layer, it makes sense to apply plane splits and segre- gate areas containing each voltage. This is an efficient way to distribute power, but it relies on human input to ensure accuracy and gets risky for more complex boards. We think a bet- ter method is to use polygon area fills to make connections. With polygon area fills, when you name each, net connections on all layers become visible and vias of different nets will not connect. This enables your CAM tool to perform error checking on your separate area fills automatically. As you design, there are steps you can take to prevent problems with mixed signal output. First, partition your PCB with separate digital and analog areas: • Make sure digital and analog components are assigned to their respective areas • Never route digital signals through analog territory and vice versa Figure 3: Our CAM tool simply tells you that you have a split plane; it does not analyze the connections to that plane. Figure 4: DGND and AGND are tied to the same area of the ground plane, which will cause noise on your analog ground and is not a lot of fun to troubleshoot; again, no error will be generated in the design tool. Figure 5: The drawn polygon assigned to +5V will not connect to any other vias, shorts will be avoided, and +3KV net will show up as open; you will get a warning that U5 is in the wrong space. Also, notice the guide wires from unconnected pins. Figure 1: Our CAD tool gives a loud warning, but some CAD tools assume that you are aware of this limitation and don't give any warning when you apply multiple nets to a layer. Figure 2: Notice how +5V and +3KV are both tied auto- matically to this plane and will not generate any error; however, it will let all of the magic smoke out of your PCB.

Articles in this issue

Archives of this issue

view archives of Design007 Magazine - Design007-Feb2019