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58 DESIGN007 MAGAZINE I APRIL 2019 the entire interconnect. The IBIS specification is a fast and accurate behavioral method of mod- eling high-speed transmission lines throughout the entire design process. Key Points • To ensure the prototype has first-pass suc- cess, designers need to perform intensive and accurate board-level simulation • The IBIS specification is a fast and accu- rate behavioral method of modeling input/ output buffers based on I-V curve data derived from measurements or full circuit simulation • SPICE models are not well suited to simu- lating an entire multilayer PCB containing several hundred nets and drivers • SPICE models can disclose substantial information that is confidential, including circuit nodal connections and underlying fabrication processes parameters • The IBIS model does not require proprie- tary information about the modeled circuit since no process or circuit design informa- tion is disclosed • Since the IBIS is behavioral, the simula- tion time for a model can run some 25 times faster than a structural model, such as that used in SPICE • A CMOS IBIS model uses only a few tables of data to represent the behavioral charac- teristics of a buffer • One of the major upgrades in the IBIS version 5.0 specification was the introduc- tion of power-aware models • The interconnect topology includes the stackup definition, arrangement of a net- work, its nodes, sequence, and connecting transmission lines and vias • The impedance of the trace is extreme- ly important, as any mismatch along the transmission path will result in a ringing, reduced signal quality, and possibly the radiation of noise • Using mainstream PCB layout software, one really has no idea what the driver impedance is, let alone the capability to match the driver to the impedance of the transmission line DESIGN007 Further Reading • Olney, B. "Beyond Design: Pre-layout Sim- ulation," The PCB Magazine, July 2012. • Olney, B. "Beyond Design: Impedance Matching—Terminations," The PCB De- sign Magazine, October 2013. • Olney, B. "Beyond Design: New Function- ality Improves Designer's Productivity," The PCB Design Magazine, February 2017. • Duehren, D., Hobbs, W., Muranyi, Arpad, & Rosenbaum, R. "I/O Buffer Modeling Spec Simplifies Simulation for High-speed Systems," Intel Corporation, September 26, 1994. • Huq. S. B. "Ease System Simulation With IBIS Device Models," National Semicon- ductor Corporation, Electronic Design, De- cember 2, 1996. • Behera, D. K., Varshney, S., Srivastava, S., & Tiwari, S. "Let's Get Intimated With IBIS," Freescale, Design & Reuse, 2019. • Johnson, H., & Graham, M. High-speed Signal Propagation: Advanced Black Mag- ic, Prentice Hall, 2003. Barry Olney is managing director of In-Circuit Design Pty Ltd (iCD), Australia, a PCB design service bureau that specializes in board-level simulation. The company developed the iCD Design Integrity software incorporat- ing the iCD Stackup, PDN, and CPW Planner. The software can be downloaded from www.icd.com.au. To read past columns or contact Olney, click here.