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JULY 2019 I SMT007 MAGAZINE 111 the new specification was applied. Figure 19 shows the overview of the improvement in the average yield loss due to nodules and scratches before and after the process improvement and specification modification. Summary To resolve significant yield loss during PCB manufacturing caused by nodules and scratches on wire-bondable features, the PCB manufac- turing process was improved to minimize the occurrence of nodules and scratches and wire bonds were evaluated to determine the allow- able size of nodules and scratches on bonding pads for the gold wire-bonding process called SSB. Based on the wire-bonding test results, the initially adopted specification—which did not allow for any nodules and scratches on any wire-bondable surface—was changed to accept certain nodules and scratches based on size and the effect on the surface finish. A summary of improvements made to the PCB manufac- turing processes, the wire-bonding test results on nodules and scratches using the SSB pro- Figure 18: Average yield loss with new specification. Figure 19: Overview of improvement in average yield loss before and after process improvement and specification modification.