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58 PCB007 MAGAZINE I AUGUST 2019 such as embedded trench fill and simultaneous through-hole plating and via filling with an en- hanced pattern plate. These new solutions not only offer better trace profile, but they also de- liver via fill and through-hole plating. We also describe two electrolytic copper plating pro- cesses, the selection of which could be based on the via size and the dimple requirements of the application. Process I offers great via fill for deeper vias up to 80–120 µm diameter and 50–100 µm deep (Figure 1). Process II is more suitable for shallow smaller vias 50–75 µm di- ameter and 30–50 µm deep. In this article, we show that these two pro- cesses provide excellent surface uniformity and trace profile (Figure 2) while also provid- ing via filling and through-hole plating capa- bilities when controlled within given param- eters. Process optimization and thermal and physical characterization of the metallization are also presented. Introduction The IC substrate is the high- est level of miniaturization in PCB technology, providing the connection between the IC chip and the PCB. These connections are created through a network of electrically conductive copper traces and through-holes. The density of the traces is a crucial factor in terms of miniaturiza - tion, speed, and portability of consumer electronics. Trace den- sity has grown immensely over the past few decades to meet today's printed circuit designs, which include thin core material, fine-line widths, and smaller di - ameter through-holes and blind vias. The development of fan-out panel-level packaging (FOPLP) has been a top- ic among the microelectronics community for some time. The main driving forces to push this new technology are cost and productivity. Tradi- tional fan-out wafer-level packaging (FOWLP) uses a 300-mm wafer as the production vehi- cle because larger wafers are difficult to ob- tain. Therefore, the FOWLP has a limitation on the basic unit of process, thereby increas- ing the processing steps, manpower, and cost while also having a low yield. The advantage of using a PCB-like substrate is that manufac- turers have more design flexibility and surface area compared to the wafer. As an example, a 610 x 457 mm panel has almost four times the surface area of a 300-mm wafer [1] . Therefore, processing a panel this size drastically reduc- es cost, time, and processing steps. This is a huge advantage for the high-volume produc- tion market. Figure 1: Capability of the processes for simultaneous via fill and through-hole plating with enhanced pattern plating. Figure 2: Embedded trench fill performance of the formulation, showing uniform height between pads and lines.

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