Issue link: https://iconnect007.uberflip.com/i/1288481
SEPTEMBER 2020 I PCB007 MAGAZINE 109 assembled by the team after just two months together. You can see that materials, methods, machines, maintenance, measurement tech- niques, and human inputs can all contribute to some aspect of the weak microvia team. It is a very thorny problem. To sort all of these out would be an immense undertaking for some kind of test design. These presentations review the efforts to determine the ger- mane causes of weak microvia interfaces. Figure 6 is from IMEC and ESA, which shows stress sim- ulations from internal evalua- tions. On the upper left, you see staircase microvias. On the up- per right, you see a three-stack of microvias, as well as semi- stacked "two over one" or "one over two" microvias. You see that the most stressful situation is in the stack microvia. Unfortunately for us, that is the configuration that takes up the least space on the board; it's the most desirable from an intercon- nection density standpoint but the most likely to fail. Figure 7 shows IMEC graphics between a three-stack staircase and staggered microvias. They found that the stag- gered microvias have slightly less stress than the staircase microvias, at least in our simu- lation. You will see that most of these designs occur in some of the presentations of future work. Figure 6: IMEC and ESA test simulations with actual builds and thermal stresses. Figure 7: The effect of varying microvia configurations shows stacked as the most strained and staggered as the least strained. (Source: Raytheon)