PCB007 Magazine

PCB007-Nov2020

Issue link: https://iconnect007.uberflip.com/i/1309864

Contents of this Issue

Navigation

Page 80 of 123

NOVEMBER 2020 I PCB007 MAGAZINE 81 nal loss in high-frequency (>15 GHz) RF ap- plications. Common Defects in Electroplated Through-Holes If the plating setup is not optimized, com- mon defects may include: 1. Cracking in the plated copper under thermal shock. This is a function of grain structure and excessive dielectric Z-axis expansion and contraction. 2. Post separation between the plated copper and the inner layer. This defect is seen after copper plating; however, its source is usually incomplete smear removal and/ or inadequate pretreatment. 3. Voiding that results in non-continuity in the barrel of the hole. This is usually corrected in the pretreatment cycle by eliminating entrapped air in high aspect ratio holes. 4. Dog-bone formation, meaning excessive plating at the knee and the surface as compared to the barrel of the hole. This is corrected by choosing and setting up a "leveling" chemical additive system and reducing ASF with a proportionate increase in plating time. Plating Blind Vias Blind and buried vias are extensively used in high-density interconnect (HDI) PCBs. Blind vias, in general, connect layer 1 to layer 2. In some designs, the blind via may connect layer 1 to layer 3. Incorporating blind and buried vias allow for more connections and higher board density required for HDI PWBs. They deliver benefits, such as increased layer density in smaller pitch devices, coupled with improved power delivery. The hidden vias help keep the board light and compact. It is com- mon to see blind and buried vias designed in sophisticated, lightweight, higher-cost, elec- tronic products like cellphones, tablets, and medical devices (Figure 2). Blind vias are formed using controlled depth drilling or laser ablation. The latter is the more common method in use today and is usually followed by plasma cleaning to remove any or- ganic residues left after laser ablation. Stack- ing of vias is manufactured through sequential lamination. The resulting vias may be stacked or staggered, adding extra steps to manufac- turing and testing, which come with add- ed costs. The formed vias may be plated or filled. Plat- ed vias are plated in the same chemistry that is used for through-hole plating. Filled vias re- quire a special chemical system. The system is based on high copper and low acid, cou- pled with a special organic additive system de- signed to suppress the surface plating, allow- ing the plating to proceed from the bottom of the hole to the surface, thus filling the via. Similar to through-hole vias, optimizing the buried via plating process includes the same six steps as follows. 1. Pretreatment The same basic concepts as with through-hole vias hold true here. 2. Pattern vs. Panel Plate Pattern plate for blind vias is also re- ferred to as dot pattern. The only plat- able areas after imaging are the pads (dots) around the vias. There is no cir- cuit pattern. In most cases, the pads are all of the same geometry; however, their location relative to the edge of the pattern varies. The surface of pads in Figure 2: Schematic of a filled blind via.

Articles in this issue

Archives of this issue

view archives of PCB007 Magazine - PCB007-Nov2020