Issue link: https://iconnect007.uberflip.com/i/1391285
JULY 2021 I DESIGN007 MAGAZINE 85 range with a 1V ideal AC source with zero source resistance behind the R1-L1 elements modeling the DC source. Figure 3 shows the simulated voltages at various nodes. e V(src) source voltage shows a flat line at 0 dB, since this is the constant source voltage we enforce. V(in) and V(out) are the input and output volt- ages of the filter. And finally, V(out)/V(in) is the voltage transfer ratio from input to out- put. Note that while V(in) and V(out) both have some minor peaking around 20 kHz, the light-blue line of V(out)/V(in) shows no peak- ing, but it also has just 20 dB/decade slope, whereas the absolute output voltage drops more steeply. e various impedances can be simulated by attaching a 1A AC current source to the pieces, as shown in Figure 4. e AC simulation uses linearized models and therefore the 1A AC test current that may otherwise damage some of the real components, can be used here with no concern. In Figure 5 we see that the minor peaking is related to the impedance of the main supply rail that serves as a source and provides input to the filter. e impedance of the series induc- tor starts out at the 0.1-ohm DC resistance and at about 5 kHz it goes inductive. Due to the large series resistance, the impedance of the output capacitor of the filter becomes resistive Figure 4: Simulating the impedance of blocks in the PDN filter. Figure 3: AC simulation results of the filter from Figure 2.