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80 PCB007 MAGAZINE I AUGUST 2021 Over the last 35 years we have seen astonish- ing advances in printed circuits, flex circuits, and component technology. e introduction of surface mount technology back in the '80s and the continued progression of that technol- ogy has proven to be a challenge for PCB man- ufacturers and the electrical test arena as well. From a development engineer standpoint, the task is to economically create the design using the best available technologies that pro- vide the optimum result. is includes, but is not limited to, component packages, blind and buried via technology, and buried passives, while also considering the manufacturing abil- ities of the selected PCB fab vendor. Consid- erations are line width, spacing, component density, and deliverable characteristics such as TDR, HiPot, inductance, and of course, over- all electrical compliance. In the early days this was never a problem as most PCBs were plat- ed through-hole (PTH) and electrical test was straightforward. Not so much today. Design for manufacturing (DFM) is a great discipline for creating designs that provide op- timum performance while still maintaining af- fordability. However, what can be, and does get overlooked, is the design for test (DFT) variable. As greater manufacturing demands are put to the manufacturer, it also creates challenges to validate the electrical deliver- ables that may be required. From an electrical test standpoint, the layer count of a given PCB is not an issue. e CAM systems of today can process many layers in- cluding blind/buried vias, buried passives and the like. e challenge becomes the actual test. Net intelligence is not the hurdle but how to effectively interrogate the PCB to provide vali- Design for Manufacturing? Don't Forget Test! Testing Todd by Todd Kolmodin, GARDIEN SERVICES USA

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