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JANUARY 2022 I PCB007 MAGAZINE 89 "heterogeneous Integration." is can be seen in Figure 3. e design trade-offs will be between trace geometry and its losses and innerlayers using ultra-HDI technolo- gies. is is where the innovative technology of VeCS 8 will provide vertical traces to any innerlayer using less space, easy plating and reduced electrical par- asitics. e increasing com- plexity of HIR will add more functionality to these substrates and result in modules, as seen in Figure 4, that will contain IC chips of various materials/ connections, embed- ded components, RF/ antennas, optical wave- guides and even energy storage. Conclusion e prediction from YOLE Development about the future of pack- aging for these electronics out to 2030 is uncer- tain, as seen in Figure 5. ere are overlapping capabilities currently down to 5/5-micron L/S Figure 3: Heterogeneous integration takes various dies and discrete components and integrates them onto fine-line substrates (such as PCBs). (Source: IEEE HIR) Figure 4: Vision of heterogeneous integration from the IEEE Roadmap (Source: IEEE)