Issue link: https://iconnect007.uberflip.com/i/1478618
SEPTEMBER 2022 I DESIGN007 MAGAZINE 25 50 ohms impedance. Dielectric constant, trace thickness, width and clearance can also be established in this way. For DDR type designs, I like to start with closely coupled plane pairs on the second and third layers from the top and bottom (Figure 2). Unfortunately, standard decoupling capacitors have little effect over 1 GHz and the only way to reduce the impedance of the PDN above this fre- quency is to use tightly coupled power/ground plane pairs or, alternatively, on-die capaci- tance. ese plane pairs should be positioned Figure 1: A field solver can be used to determine the required dielectric thickness (simulated in the iCD Stackup Planner). Figure 2: Tightly coupled plane pairs reduce loop inductance.