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44 SMT007 MAGAZINE I NOVEMBER 2022 bining dissimilar chips into an integrated package, called heterogeneous integration, and including somewhat generic chip build- ing blocks called chiplets, is quickly becom- ing necessary to keep pace with technology advancement. Challenges in Traditional Packaging and Chip Interconnect Printed circuit boards (PCBs) are the back- bone of electronics, acting to connect inte- grated circuits (ICs) and discrete components to form a larger working circuit. Historically, individually packaged chips and components are mounted to a PCB and interconnected to deliver functionality. Following this methodology, all the lay- ers in a board act as separate interconnects, leaving the top and bottom of the board to place components. As the drive to miniaturize while simultaneously becoming more complex requires the addition of more components, this is where we'll begin to see limitations. An important part of the CHIPS Act was the recognition that not only does the United States need to make massive investments in chip-making facilities or foundries, but also to invest heavily in advanced packaging. Serv- ing as the next step of combining or integrating these chips with novel approaches will be just as important in the innovation of U.S. semi- conductor manufacturing capabilities. Some forms of this approach already exist through methodologies such as multi-chip modules or system-in-package (SIP), but more radical approaches are needed to deliver the required performance of the devices. Advance Packaging Landscape and Complementary Manufacturing Methods Companies like Intel, Qorvo, Mercury, and Skywater are pushing the limits of integrating chips and chiplets through new approaches to make chip-to-chip communication seam- less. is provides many advantages in speed as well as miniaturization, but oen requires extremely sophisticated, complex, and expen- sive tools and processing. While this is critical and important to the next generation of elec- tronics integration and packaging, an inter- connect methodology has been developed that can provide complementary capabilities: addi- tive electronics manufacturing. We see additive manufacturing all around us in the form of 3D printing. But several orga- nizations are actively working on a method to bring these additive and printing methodolo- gies into the process of printing interconnects for electronics. is can enable manufactur- ers to now print circuits layer by layer, open- ing the door to new capabilities in intercon- nection and allowing for components to now be embedded within the PCB itself. In a sense, this takes care of the conventional packaging steps of the manufacturing process because you can add the raw component within the layers of the board. As a result, we've begun to see a blurring of the lines between chips, packages, and the printed circuit board, oth- erwise known as system level packaging. With the combination of these new possibilities for component integration and printed inter- connect process, we can see many advantages such as far fewer process steps, lower cost, less waste, and rapid prototyping. is will not replace the more expen- sive approaches for chip-to-chip integration entirely but can provide a complementary One of the key strategic avenues that's arisen is rethinking how we approach the packaging and integration of modern semiconductors.