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Design007-June2023

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46 DESIGN007 MAGAZINE I JUNE 2023 radiate to create more EMI. Apart from the issues of EMI, signal integrity, and crosstalk, this noise can cause intermittent operation of the product due to timing glitches and inter- ference, dramatically reducing the reliability of the product. Excessive ringing can also lead to power integrity issues. Flight time delay and skew are the key pillars in high-speed PCB design signal integrity. One of the driving factors for flight time and skew performance is the placement of components. In the classic high-speed design flow, timing specifications simulation results are compared to determine placement and routing con- straints. Given a length constraint, a designer can control signal integrity by controlling the PCB trace topology of the various parts of an interface. Included in this topology are any terminations. Figure 2 shows an eye diagram of a signal with jitter and ringing due to poor termination. e integrity of the PCB stackup and the PDN are the basis for a stable product. Multi- layer PCB design is becoming more complex and less forgiving—it's not just about signal integrity, crosstalk, and EMI. e substrate and the power delivery system are extremely critical and if they should fail then the whole system can go down or, in the worst case, may just work intermittently. Today's high-performance processors employ low DC voltages with high transient currents and high clock frequencies to minimize power consumption and hence the amount of heat dissipated. A typical high-speed design con- tains 10 or more individual power supplies. And unfortunately, the lower core voltages, higher currents, and faster edge rates all impact the power distribution network (PDN) design, as well as signal integrity. Ideally, the effective impedance of the PDN should be kept below the target impedance up to the maximum required bandwidth. How- ever, if the impedance is too far below the tar- get, then this implies that the PDN has been overdesigned which unnecessarily increases Figure 2: Eye diagram of a signal with poor termination.

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