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22 DESIGN007 MAGAZINE I NOVEMBER 2023 Feature Article by Douglas Brooks and Dr. Johannes Adam Your thermal designs are (probably) ineffi- cient. e inefficiencies are unnecessarily tak- ing up board area and blocking routing chan- nels. is is likely true in at least three areas: 1. Your high-current-carrying traces are probably too wide. 2. You probably use too many vias in your high-current-carrying traces. 3. Any thermal vias you use are (almost) worthless. Trace Width Most designers rely on the trace widths sug- gested in IPC-2152 1 , the "bible" for calculat- ing high-current trace widths (unless you have read our book 2 ). IPC-2152 is the best, most Your Thermal Designs Are Inefficient thoroughly researched study of trace currents and temperatures available. But it does have some weaknesses. One weakness is that it (by necessity) studies 6-inch-long traces in isola- tion. But traces are not all 6-inches long nor in isolation. ere are nearby design and material parameters that impact trace temperatures, most of them in a downward direction 3 . Per- haps the most important parameter lowering trace temperature is the presence of a plane underlying the trace. Most boards nowadays have such a plane. Figure 1 shows the impact a plane can have on trace temperature. It is a simulation 4 of two 1-ounce traces carrying 14 amps each; the top one is 120 mils wide, the bottom one is 200 mils wide. e board is normal FR-4 mate- Figure 1: Planar impact on trace temperatures.

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