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DECEMBER 2023 I DESIGN007 MAGAZINE 19 Figure 5: Illustration of propagation delay. L is the length of the microstrip line Putting It Into Action To illustrate how all these equations come together, let us examine how to calculate the numbers around a fairly common design struc- ture: a 50Ω microstrip. For this microstrip con- figuration, we will use the following values: Z 0 = 50Ω h = 0.0146" 1 t = 0.0024" ε r1 = 4.1 ε r2 = 1.00 2 e first step is to calculate the effective dielectric constant (ε r ) for the external trace using the equation we discussed previously. Make sure you keep track of the output. In our example, we get: ε r = 2.808 Next, we must determine the required trace width to meet our 50Ω target. e width of the required trace will depend on the thickness of the copper layer on the PCB (t), the effective dielectric constant (ε r ), and the desired charac- teristic impedance (Z 0 ). We next use the characteristic impedance equation discussed earlier and solve for trace width (w). You might need to use a calculator or equation solver to calculate w 3 . By inputting the values we have calculated already, we find: w = 0.030" (30 mils) is requires another look. e resulting 30-mil trace is a little on the wide side for most designs. However, if controlling impedance is critical, then this is the measurement the design must account for. If a 30-mil trace will absolutely not work, other variables can be modified to still achieve the required imped- ance. For example, both material type and thickness could be altered to meet our target numbers. For Fun Since length is such an important part of the equation, it is interesting to calculate the prop- agation delay for a 3"- and 6"-trace. Here's how the numbers work out: For 3" trace, τ = 4.2 x 10 -10 seconds For 6" trace, τ = 8.5 x 10 -10 seconds Design Tips Trace ickness (t): e thickness of the trace should be at least 1-ounce copper (0.0014") to ensure good current handling capability. In this example, we used 1-ounce copper (0.0014") plated to 0.0024". Trace Spacing Calculation: To minimize crosstalk between traces, make sure the spac- ing between those traces is at least three times the height of the dielectric substrate. Tying It All Together ese calculations will help you create 50Ω traces for high-speed and RF PCBs that pro- vide good signal integrity and minimize loss. In addition, with these equations in your toolkit, you are ready for any variation in impedance control. However, remember that PCB sub- strate quality and manufacturing process accu- racy will have a big impact on the performance of the transmission lines in RF circuits. We look forward to seeing what you will design next. DESIGN007 References 1. This is the standard dielectric thickness of some manufacturers' 6-layer stackup. 2. Don't forget to account for air. 3. It's time to dust off those rules for manipulating natural logs. Matt Stevenson is vice president at Sunstone Circuits, a division of American Standard Circuits. To read past columns, click here.