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102 PCB007 MAGAZINE I MARCH 2024 the dies are wire bonded and discretes are sol- dered. is side is encapsulated. e other side has the lands in a ball grid array pattern. A part of the IMPS artwork is shown in Figure 4. e test vehicle was built on 2-mil Shel- dahl an adhesiveless polyimide film called Viain™ 5 . e basic design rules are 50 mm lines and spaces, 150 mm via target lands over 25 mm laser-drilled vias. e IMPS mesh consisted of 200 mm lines and 50 mm spaces, with the lines offset from the via row or col- umn centers. Wirebond pads consisted of 200 mm x 350 mm rectangles on both metal layers, tied together with two vias. e test vehicle showed conclusively that the IMPS topology could be applied to MCM-Ls and BGA substrates without multi-layering. Figure 5 is another closeup of the IMPS topol- ogy in an MCM-L. Summary e new microvia topologies, IMPS, have demonstrated the application to simplify- ing complex multilayer, SLPC, and interpos- ers. IMPS can reduce the structure to a two- metal interconnect. ese results show that these topologies have the capacity to positively impact how electronic products are packaged and interconnected. PCB007 References 1. "Theory and Experimental Conformation of the Interconnected Mesh Power System (IMPS) MCM Topology," by L.W. Schaper, S. Ang, M. Ahmad, and Yee L. Low, Journal of the International Society for Hybrid Microelectronics, Vol. 18, No. 2, 1995. 2. "Power Distribution System of the Intercon- nected Mesh Power System (IMPS)," by L.W. Schaper, S. Ang, Yee L. Low, and Danny R. Oldham, ICEMCM, Trans. On Components, Packaging and Manufactur- ing Technology, February 1995. 3. "Design of the Interconnected Mesh Power System (IMPS) MCM Topology," by L.W. Schaper, S. Ang, Proceedings of the ICE on Multichip Modules, April 1996. 4. "Comparison of the Interconnected Mesh Power System (IMPS) and Buried Stripline Intercon- nect Topologies," by L.W. Schaper and Carl V. Reyn- olds, Proceedings of the ICE on Multichip Modules, April 1994. 5. "2-Metal Layer Taper: The Next Generation in BGA and CSP Substrates," by G.R. Weihe, The Board Authority, Volume 2, April 2000. Happy Holden has worked in printed circuit technology since 1970 with Hewlett-Packard, NanYa Westwood, Merix, Fox- conn, and Gentex. He is cur- rently a contributing technical editor with I-Connect007, and the author of Automation and Advanced Proce- dures in PCB Fabrication, and 24 Essential Skills for Engineers. To read past columns, click here. Figure 5: An IMPS topology before and after assembly.