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Design007-Aug2024

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12 DESIGN007 MAGAZINE I AUGUST 2024 and it's not uncommon for the customer to not know if they apply either. Rather than remov- ing them, they commonly remain "just to be safe." is oen leads to extra processes like via fill, planarize, and plate. It may lead to building to Class 3 vs. Class 2 or extra testing and paper- work requirements. It may lead to adding hard gold vs. just ENIG. It may lead to ordering more exotic materials where standard FR-4 was fine. It also can lead to back-and-forth DFM ques- tions as the fabricator must confirm what does or doesn't apply, and with which offshore ven- dors can mean delays of multiple days. Similarly, if there are no fabrication notes, the fabrication vendor is le guessing and may choose processes or materials that are more expensive or not absolutely needed, or they may miss important aspects of the design, like controlled impedances or that a specific thick- ness is needed for edge connectors. Make sure to review your notes for clarity and correctness before sending them to the fabrication shop. If you are unsure how to specify your require- ments, talk to your fabricator. Another fabrication note mishap is not call- ing out whether the boards should be v-scored or have mouse bites for breakaway tabs. It is common for offshore high-volume designs to use tabs without scoring or mouse bites and for assemblers to have the tools necessary to depanelize them. is is rarely the case in lower-volume or prototype shops. I have seen countless cases of a customer providing data from a previous high-volume production build that included solid tabs that smaller proto- type assembly shops were not able to easily depanelize. If the assembly house is unable to depanelize the board correctly, this could lead to damaged boards, damaged components, and a possible respin of the boards. Verify with your assembly house on how they will want to depanelize the boards and add that to your fab- rication notes for your fabrication shop. Copper thieving callouts are a less common fabrication note mistake, but still one that can cost an entire build to be scrapped. It is com- mon for RF boards to have intentional voids that you don't want any copper added to, like thieving. Make sure your fabrication notes clearly specify if thieving can be added, and where on the board it should be avoided. I've seen frustrated customers find out aer days of debugging assembled boards that they aren't working as expected due to thieving being added to areas where it shouldn't be. ere is no salvaging this mistake; it's a respin. Now let's address vias-in-pad in thermal ground pads under ICs. In most cases, assem- blers will windowpane the stencil to distrib- ute the paste and it's not at all an issue to have non-filled vias in larger center ground pads. If your design doesn't otherwise need via-in- pads filled, then don't call it out for your IC thermal ground pads. Make sure your fabrica- tor knows they don't need to be filled or they might assume they do. Finally, make sure your fabrication notes clearly call out where parts overhang so that they don't panelize it in a way that they can't be assembled in panel. Forcing assemblers to work "one-up" vs. in array adds cost and time. is is an area oen missing from fabrication notes and one that would save a lot of frustra- tion for the assembler if it were added. " If you are unsure how to specify your requirements, talk to your fabricator. "

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