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AUGUST 2024 I DESIGN007 MAGAZINE 57 PCB Design Recommendations Based on the test results from this study, a couple of qualitative design recommendations could be established as follows: a. When using asymmetric hybrid construction, it is essential to use a "thermal-mechanical robust" hybrid material. b. By "thermal-mechanical robust," it means that the hybrid material, when used in a pure homogenous stackup, should be capable of passing reliability tests at the concerned thickness, hole size, and pitches. c. The copper weight of the mirror layers in the stackup (e.g., L2 and L17 of an 18-layer stackup) must be the same, and the copper circuitry density must be similar (within a 5% difference). d. The coefficient of thermal expansion (CTE) of the base material and the hybrid material shall also be similar. e. Non-functional pads may be added to some plated through-holes to enhance delamina- tion performance ("anchoring" the laminate). Roughly speaking, non-functional pads shall be added every 22 to 40 mils apart. However, keep in mind that the use of non- functional pads may have adverse effects on plated through-holes that connect to high- speed signal lines. f. There shall be no known compatibility issues of the two materials (e.g., outgassing at the junction of the hybrid during lamination process) as advised by the CCL suppliers. When the above requirements are met, there seem to be no restrictions on the (a) hybrid material loss category, (b) hybrid layer quan- tity, and (c) hybrid layer locations. is offers much more flexibility in routing. In this study, the test board was designed as a 16-layer stackup with a thickness of 110 mils and a via-via pitch of 0.6 mm. Based on the test results and previous experience of PCB and CCL suppliers, the limits of asymmetric hybrid design could potentially be pushed to a 22-layer stackup with a thickness of 130 mils and a via-via pitch of 0.6 mm. Conclusions is research aimed to explore the thermal- mechanical and reliability risks of asymmet- ric hybrid PCBs using a qualitative approach. Based on the test results, we can conclude that an asymmetric hybrid PCB stackup, when combined with suitable materials and follow- ing the technical recommendations from PCB designers, can yield reliability performance as good as a pure homogeneous material stackup design. Care should be taken to ensure that the evaluation has been conducted and focused solely on PCB raw card level performance. While some test matrices and material combi- nations demonstrated good reliability perfor- mance in this study, it does not imply that all the materials can be randomly combined and yield equally positive results. Companies intend- ing to use asymmetric hybrid PCB stackup in their products are strongly advised to conduct their own research and develop their technical know-how, particularly concerning the effects of such PCB stackup on PCBA level reliability performance. DESIGN007 References 1. "Application of hybrid PCB stackup," by Y. Ren, M. Yin, C. Ye and X. Ye, 2017 IEEE Electrical Design of Advanced Packaging and Systems Symposium (EDAPS), Haining, China, 2017, pp. 1-3. 2. "Asymmetric Hybrid PCB Design for Cost- effective and Performance-driven Solution in Data Center Platforms," by A. Chang et al, 2023 18th International Microsystems, Packaging, Assembly and Circuits Technology Conference (IMPACT), Tai- pei, Taiwan, 2023. Kaspar Tsang is senior manager of component engineering at Lenovo Cloud Services in Hong Kong. Gause Hu is a senior supplier quality engineer at Lenovo in Shenzhen, China. Jimmy Hsu is with Intel in Taipei, Taiwan. Aje Chang is with Lenovo in Taipei, Taiwan. Alan Sun is with Lenovo in Taipei, Taiwan Brian Ho is with Intel in Taipei, Taiwan. Ryan Chang is with Intel in Taipei, Taiwan. Thonas Su is with Intel in Taipei, Taiwan.