Issue link: https://iconnect007.uberflip.com/i/1528798
50 SMT007 MAGAZINE I NOVEMBER 2024 Iyer: CLP comes in when a device needs to be packaged. The industr y does this in two differ- ent ways: a single-chip package and a multi- c h i p m o d u l e . W i t h i n CLP, one chip can be attached to a single pack- age. at's a single-chip package (SCP). W hen m u l t i p l e d e v i c e s a r e integrated into a pack- age, that becomes a multi-chip module (MCM). For heterogeneous integration, that multi- chip module can have a silicon chip and a non- silicon chip, such as a silicon-based chip and a gallium-nitride chip or maybe a silicon chip and silicon carbide chip. Today, they all come in different flavors. e multi-chip modules and the substrate that we use inside can be sili- con substrates, ceramic or laminate substrates, or glass substrates. e industry is also making use of glass substrates these days. Now, SLP starts once the chips are inte- grated into a single-chip or multi-chip pack- age; they must then be assembled to the board. at's where the system-level packaging starts. It goes from package to board and then board to racks to final system assembly (FSA). Some people interpret CLP and SLP as first-level and second-level packaging. When you look at the textbooks, some refer to the component-level packaging as first-level packaging, and system- level packaging as second-level packaging. You really detail those in your report and discuss the challenges and opportunities for optical. Iyer: Yes. As we go in for higher-speed inter- connects, we talk about packaging for high- speed applications, but packaging and inter- connects need to be thought through as one entity. ere are no packages without intercon- nects, whether they are traditional wire bond interconnects or flip-chip interconnects. Opti- cal interconnects are finding their way to very high-speed interconnections as an alterna- tive to traditional copper-based interconnects. We need the bandwidth and lower latency for high-performance computing and very high data communication rates. ese demands are pushing into optical-based interconnects. e term we commonly u s e i s c o - p a c k a g e d optics (CPO), where the optical component and electronic components are integrated into one package. This has implications down the road for what EMS companies will need to assemble. Iyer: Absolutely. For assembling optical com- ponents into the board, you are dealing with fiber-based optical interconnects, so how do you assemble them efficiently? You're coupling light; it's not coupling electrical signals there. How do you keep the coupling efficiency high during assembly? at is the key challenge that must be addressed between the packaging and board assembly communities. You have been spearheading extensive research on advanced packaging recently. What are you looking to accomplish for the electronics industry with this work? Kelly: It's a multifaceted answer. IPC spends a lot of time on advocacy, working on behalf of our members to be the voice of the electron- ics industry to governments. As Devan men- tioned earlier, we work globally and regionally, and the work we've done over the past sev- eral years with advanced packaging started at that highest level of advocacy. We've addressed questions like, "What is needed? Where are there gaps? Where can investments be made? How can we help governments and companies in certain regions bolster their capabilities?" Over time, certain things in the supply chain can, will, and have moved. But make no mis- take, the global supply chain is alive and well, and for a sustainable business, different geog- raphies will be the primary supply base of cer- tain electronics elements. Devan Iyer