Issue link: https://iconnect007.uberflip.com/i/1534385
I have been involved in high-density elec- tronics substrates since 1970 when I joined Hewlett-Packard's RF semiconductor group aer college. Figure 1 shows the difference between trace/space lithography for sub- strates and silicon starting in 1970. My projects involved sapphire circuits for RF devices, but the figure displays the state of PCBs and inte- grated CMOS circuits and their packaging, not discreet RF devices. Even then, semiconduc- tors were 50X higher density. HP's Involvement With Asia I started in HP's advanced semiconductor group. HP was a leader like IBM. However, it used sapphire for many high-frequency and thermal performances. e process was called silicon-on-sapphire (SoS). HP used this to cre- ate the first single-chip 4-, 8-, 12- 16-, 32- and 64-bit microprocessors over the next 40 years, as seen in Figure 1's die size—driven by HP's SoS/ NMOS3 process. Today, the gap has increased 1600 times, and HP's IC fab is now Broadcom. is process led to HP's heavy investment in Asia for back-end fabrication, assembly, and testing in Singapore and Malaysia. When HP became involved in creating advanced multilayer PCB fabrication in Taiwan in 1984 (where I was in charge of the project), I included our new HDI laser drilling process and metallization, which was 20 years ahead of IBM and Europe. What Drives Metallization? One of the oldest metallizations for PCBs 50 PCB007 MAGAZINE I APRIL 2025 Figure 1: A comparison of circuitry photolithography used in PCBs/substrates and CMOS die vs. the time- line from 1970 until today, with die size as an additional boundary condition. (Source: HDPUG 1 ) Novel Metallization for UHDI Happy's Tech Talk #38 by Happy Holden, I-CONNECT007