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28 SMT Magazine • February 2014 The results of the nanocoating tests were as anticipated. Lots of data has been generated over the past two years that show the nanocoat- ing improves print yield and repeatability. The new nanocoating formulation's repeated out- performance of the original product demonstrates real improvement in this materials technology and is another example of materials advancements that continue to improve stencil printing technology. Again in this test, the nanocoated stencils demon- strated slightly lower transfer efficiency than non-treated stencils. This trend was also observed in the original tests in 2011. It is hypothesized that the lower TE of the coat- ed stencils may be due to crisper print definition. This hypothesis may be tested in an upcoming investigation. The superior print performance of square vs. circular apertures on microBGAs was not surprising, based on information in cur- rent literature. What was surprising, however, was the degree of improvement the square aper- tures introduced. On a cautionary note, square apertures can present gasketing issues on non- solder mask defined pads, so they should be im- plemented carefully. The PCB used in this study has solder mask defined pads. The new aperture geometry will still be implemented carefully, and will bear less risk than if the PCBs were de- signed with non-solder mask defined pads. The most surprising—and most remark- able—findings of the entire study were the wipe frequency tests on nanocoated stencils. Not only did print yields go up, so did volume re- peatability! These results were completely unex- pected, and are currently the subject of contin- ued investigation. Ongoing and Future Work At the time of publication, a new test had just been executed to attempt to visualize the flux behavior on coated and uncoated sten- cils with and without under wiping. Using the original test vehicle, an uncoated stencil (from the regular manufacturing site) was masked and treated with Nano2 over one-half of the print area to enable side-by-side comparison and anal- ysis. UV tracer was added to the solder paste, and the PCB side of the stencil was photographed under black light after several different print and wipe scenarios. Photographs of some of the results are shown in Figures 23 and 24. The com- plete results will be published at a future date. acknowledgements The authors would like to thank the stencil provider for their participation in this study. They would also like to recognize their colleagues Harshal Tarar, Matthew Sa- wicki , and Jonathan Drago- nas, who assisted in executing the tests. SMT references 1. Shea, C. and Whittier, R., "Evaluation of Stencil Foil Materials, Suppliers and Coatings'" Proceedings of SMTA International, 2011. 2. Ashmore, C., "The Changing Shape of Print Transfer Efficiency," Circuits Assembly Magazine, January, 2013. 3. Lober, David, and Bixenman, Mike, et al., "Understencil Wiping: Does it Benefit Your Process?" Proceedings of SMTA International, 2012. FINe-TuNING THe STeNCIL MaNuFaCTurING PrOCeSS continues FEATUrE Chrys Shea is the president of Shea Engineering Services, a consulting firm that produces technical studies and communi- cations tools for the electronics manufacturing industry. ray whittier is the principal surface mount technology process engineer at Vicor. The most surprising— and most remarkable— findings of the entire study were the wipe frequency tests on nanocoated stencils. Not only did print yields go up, so did volume repeatability! " "

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