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April 2014 • The PCB Magazine 21 involves what is known as conformal plating (Figure 7). The second option is known as su- perfilling of the vias with electroplated copper (Figure 8). In the former, the plated copper sim- ply conforms to the via wall and capture pad. Ideally, one strives to minimize any overplating on the surface while ensuring good throwing power into the blind via. When HDI designs re- quire via stacking, generally complete filling of the blind via is indicated. Even if there are no stacked vias, it is usually necessary to complete- ly fill the blind vias either with copper plate or a via fill plugging paste [9] . Copper is more ther- mally conductive than these polymeric pastes and thus provides an excellent means to trans- fer heat through the package. There are several other reasons to superfill blind vias. These are: • To increase the density and frequency for PCB • To minimize signal delays and avoid effects of electron migration • To make a smooth surface layer and avoid indentations • To enhance the I/O number of package substrates • To avoid incomplete fill of microvia hole filled by dielectric or conductive materials • To solve the differences in coefficient of expansion of metal and resin • To improve fine line design, via-on-via and interconnect reliability As high-density designs depend on the maintenance of of fine lines and spaces, con- cern arises over the loss of circuit conformity due to overetching of the circuit pattern. One way to prevent this situation is to minimize plated copper on the surface while enhancing throwing power into the via. This can be ac- complished with either DC (direct current) or PPR (periodic reverse plating). However, with recent developments in new pulse plating rectifiers, special organic addition agents and analytical control methods, PPR plating is becoming the method of choice for HDI. PPR plating tends to produce better throw into small holes and blind vias at higher current density than is practical with DC plating. As with DC, the current density used may need to be reduced as the work becomes more difficult, but there is usually a significant advantage for PPR, particularly when plating very small blind vias (e.g., less than 6 mil/150 micron diameter). PPR with proper plating parameters is able to increase the plating thickness in blind vias and high aspect ratio through-holes while helping to reduce the plated thickness on the surface. This aids in reducing undercut of the fine circuit traces during the etching operation. For maxi- mum advantage in throw, the current density, pulse waveform and brightener concentration used should be optimized for the individual ap- plication, but "middle ground parameters" can often be found where most types of work will give acceptable results. Superfilling of Blind Vias While a conformal copper plating technique works well for blind via HDI applications, many fabricators have migrated towards the superfill- ing of the blind vias. This is especially useful if stacked via designs are employed. This type of design is benefical in that the designer gains significant routing space and increased wiring density. A key requirement of superfilling or bottom-up filling as it is of- ten referred to is to deposit copper at a faster rate from the bottom, as opposed to the surface. This is referred to as the RDR or relative depo- sition ratio. A critical aspect of this process is the interaction of the various components of the organic addition agent. In this scenario, the brightener componet of the additive package se- LEAD-FREE REFLOW FOR HIGH-LAYER-COUNT PCBS continues Figure 7: example of conformal acid copper plating in a blind via.