Issue link: https://iconnect007.uberflip.com/i/304995
May 2014 • SMT Magazine 55 SIGNaL INTEGRITy IN TEST FIXTURES continues feATuRe figure 4: Wiring multiple signals when there are not enough ground connections on the DuT or JTAg controller. continuously switching (i.e., TMS, TDI and TDO). When the JTAG Controller has fixed (hard) ground pins as well as configurable (soft) ground pins, a minimum of at least one hard ground connection should be used. There does not need to be a separate ground test pin for each signal/ground pair, and instead the ground cores in multiple pairs can be con- nected to the same test pin. If this is not directly possible then small adapter boards can be used to share one ground connection across multi- ple pairs. No matter how this is achieved, it is important to keep the ground and signal wires close to each other, as shown in Figure 4. When using connectors directly on the DUT instead of test pins, a similar philosophy can still be used. For example, separating sig- nals in a ribbon cable so they are interleaved with ground connections is sensible whenever possible, and the importance of doing this in- creases as the length of cables increase. If the DUT connectors are not designed to allow this organisation then it can be achieved by creat- ing a custom cable. This might appear to be making things more complicated than they need to be; however, as previously stated, get- ting this right early on can significantly reduce the cost of fault finding later on during test de- velopment. minimising the Loop area for PCB Design To help ensure a PCB can be thoroughly and reliably tested, its testability should be consid- ered during the design phase and not just con- sidered as an afterthought. Design for Testabil- ity (DFT) guidelines can cover a wide range of areas, many of which focus on improving how much of a PCB can be tested. However, if the signals used to implement this testing are not considered, it is possible to design a board that can be thoroughly tested but where the tests themselves are unreliable. Improvements to a PCB design can be split into two categories: improving signal connec- tions to the board, and improving the signal routing within the board. The first of these should allow a test fixture to be created that can easily minimise the loop area: • When using test pins, include one ground test point close to each TAP signal test point. If board space is limited, try to include at least one ground test point for each pair of TAP signals. • When using headers that will be con- nected via ribbon cable, include ground pins