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72 SMT Magazine • May 2014 most ICT systems is 4x the amount of time it takes to test a single board. To gain the benefits of improved test throughput for panelized type board designs, the engineering team extended the semi- conductor concept of multisite testing to the design of the new brand ICT system. The mul- tisite design exploits the parallelism found in panelized boards. Up to four ICT test modules, each with test instruments that are capable of simultaneously testing a single board, can be added to the sys- tem. Economies are achieved by sharing site resources where it is possible (power supplies, receiver, display, bar code, etc.). Due to the overall system size reductions achieved, it was possible to add multiple test sites to the new ICT system without excee- ding the available space inside the automation equipment. This made it possible to expand test throughput capacity without expanding manu- facturing floor space requirements. Figure 6 is similar to Figure 3, except that it shows the ICT subsystem in a dual-site configuration. The dual-site configuration is capable of testing two identical PCBs at the same time, effectively doubling the test throughput of a single site tester. A third or fourth site could be added to achieve 3x or 4x the test throughput of a single site tester. Unlike some ICT systems that do not support parallel testing of all ICT test, this innovative multisite ICT design supports parallel testing of all ICT test techniques, which allows ma - nufacturers to truly get the performance of 2, 3, or 4 test systems in a single test system that is approximately half the size of one traditio- nal ICT system. For simplicity, the use model for developing test programs for the multisite tester is the same as it is for developing programs for single site systems. In both cases, the user develops and debugs a single test program. Once the program is debugged and running, the software repli- cates the program to simultaneously test other boards using the other test sites. Each test mo- dule has dedicated hardware and PC control- lers and can execute tests independently of the other moduless—however synchronization si- gnals are built into the design so that develo- pers can synchronize the modules to suit the test application. Changing ICT Test Economics High-volume PCB manufacturers can make use of these new brand of ICT systems which are optimized for automation and parallel test efficiency to dramatically lower the total own- ership costs of the ICT systems in their produc- tion test facilities. Savings can be achieved in three important areas: acquistion costs, fixture costs, and operator costs. Lower Capital Equipment Costs Because multisite test systems have parallel test capabilities it is possible for them to test up to 4x faster than traditional ICT systems. A sin- gle multisite system could replace 4 traditional ICT systems while taking up less than half the floorspace of one traditional ICT system. The capital equipment cost for a multisite tester is more expensive than a traditional ICT system, but buying one dual-site ICT system is approximately 30% less expensive than buy- ing two traditional ICT systems—and the cost savings become even greater with tri and quad multisite configured ICT systems. figure 6: Multisite configuration of compact electrical test subsystem with two test modules. THE CHaNGING ECoNomICS oF IN-CIRCUIT TEST continues feATuRe