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48 The PCB Magazine • August 2015 layers of woven glass reinforcement in lami- nate, to mitigate the risk of contamination. Evolutions in the capability of the electron- ics industry have caused denser PCB designs, combining signal and power circuits with large ground planes, thick copper layers, thin dielec- tric insulation and dense component assembly. While the PCB design may not have taken full account of manufacturing tolerances, this can- not be considered the root cause of failures. The electrical strength of laminates provides an order of magnitude margin compared to the design rule for voltage rating. However, PCB materials are not perfect and requirements are specified for tolerable imperfections. Conservative PCB de- sign is, therefore, an important risk mitigation. III. Insulation Resistance Test Conventional SIR test equipment was used in a recent investigation [4] to measure insula- tion resistance (IR) on internal layers. The test was set-up in support of the working group on the ECSS-Q-ST-70-12 and had the objective to verify the voltage rating of 1 kV/mm for space applications. PCB coupons were manufac- tured using various base materials by two dif- ferent PCB manufacturers. Coupons were sub- mitted to thermal cycling representing end- of-life for space applications. Before and after thermal cycling, coupons were characterised by IR testing at 75% relative humidity (RH) and 85°C while a bias voltage of 100 VDC was applied across comb patters with intralayer insulation distances of 100, 150 and 200 µm. An unexpected result of the test campaign was that one set of coupons appeared to be contaminated with fibers, which caused breach of insulation after thermal cycling. After the campaign, the short circuit was located using infrared thermography while applying a low current. Destructive Physical Analysis (DPA) was performed and progressive polishing fi- nally revealed the fault location. In all cases for which the fault location could be identified in this manner, it was observed that the breach of insulation was associated with fiber contamina- tion. In some cases it was evidenced that copper migrated from the comb pattern and re-depos- ited along the fiber. The fibers were observed in prepreg layers and therefore associated with the PCB manufacturing processes. The main conclusion in support of the EC- SS-Q-ST-70-12 was that the insulation at end- of-life was adequate for the field strength of 1 kV/mm, provided that no contamination was present. The other main conclusion was that fi- ber contamination in PCB laminate provides a pathway for electromigration to occur and can lead to latent short circuits in PCBs. A similar test campaign has recently been performed on coupons that were manufactured by using different cleaning methods on inner- layers and prepreg sheets, prior to lay-up for lamination. It showed that the risk of breach of insulation could be significantly reduced by cleaning internal layers. LATENT SHoRT CIRCUIT FAILURE IN HIGH-REL PCBS continues Figure 7: in-plane sections of comb pattern after progressive polishing showing copper migration from the conductor along the fiber contamination. FeAture