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52 The PCB Magazine • August 2015 size needs to be significant to provide reliable statistics due to the probabilistic nature of con- tamination. Nevertheless, this method is a use- ful addition to the total package of risk mitiga- tions, as it provides the PCB manufacturer with a simple quantification of cleanliness. In case of non-compliance to IPC-4101, the results can be used to return the batch and to file a claim with the base material supplier. One PCB manufacturer gathered reliable statistics over a period from Jan 2012 until Feb 2014 and reported that about one-third of in- coming batches did not comply with require- ments from IPC-4101 and another 8% did com- ply with IPC-4101, but did not comply with in- ternal requirements. The base material supplier accepted all claims, also those that were strictly in compliance with requirements of IPC-4101. B. Inspection on Etched Innerlayers To overcome the lack of statistical signifi- cance of sample inspections on base laminates, one PCB manufacturer implemented a 100% vi- sual inspection of clearances on etched inner- layers using a light table. During manufacture of a critical batch of PCBs for a power unit, it was reported that 130 innerlayers were scrapped out of a total of about 10,000, due to the presence of embedded contamination as shown in Figure 10. This is not only a laborious inspection meth- od; in addition, low yield has a high cost impact that late in the manufacturing process flow. The visual inspection step is complementary to automated optical inspection (AOI). This lat- ter test equipment verifies the conductive cir- cuit and discriminates the circuit from the di- electric by the specular or diffuse reflection. It is typically not considered to be an efficient meth- od for determining discontinuities within clear- ances when these have similar optical proper- ties. However, recently one PCB manufacturer provided contaminated etched inner layers to an AOI supplier for their assessment by new software using grey scales to successfully detect contamination. Both visual inspection and AOI can only be performed in clearances and do not provide information on the quality of dielectrics below surface copper. This is a problem on plane layers when only a small amount of copper is etched away. A breach of insulation between layers is possible in case of particulate contamination when it penetrates the layers of woven glass re- inforcement. This has been seen for chlorine- bearing particles and metallic debris. This fail- ure mechanism has been the reason to require a minimum of two layers of glass reinforcement between copper layers. Contamination caused by fibers or chemical residue is considered to be more of a risk for in-plane insulation and this can be mitigated by the visual inspection and an efficient AOI method. C. Cleanliness in the PCB Production Area The PCB manufacturing processes take place in an industrial environment, which add to the risk of contaminating innerlayers with dust par- ticles or fibers, for instance. Copper surface treat- ment of innerlayers includes a drying process as a last step. Air filtration needs to be verified for this process. Furthermore, this process is prone to static charging of innerlayers. This is also the LATENT SHoRT CIRCUIT FAILURE IN HIGH-REL PCBS continues Figure 11: in-plane view (top) of contamination embedded in clearance of etched innerlayer and cross section (bottom). FeAture