SMT007 Magazine

SMT-Sept2015

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78 SMT Magazine • September 2015 explanation of results The combined tin mitigation results from sample board designs 1 and 2 are shown in Table II. Yellow highlights are placed to em- phasize part types that did not self-mitigate, although application of a "half height rule" would have predicted self-mitigation. In the rows with yellow highlighting, the horizon- tal lead length was greater than 0.035 inches. Some of the package dimensional measure- ments were not listed on manufacturer's data sheets, and these were obtained directly from the part packages. The measurement count for each lead termination and package type is pro- vided with additional division into Design 1 and 2 measurements. The MCM samples analyzed showed self- mitigation for the relatively small chip resis- tors, and failure to self-mitigate for the much larger chip capacitor solder terminations (Table I and Figure 10). The MCM results summarized in Table I and included in the Figure 11 scatter Plot, are in general agree- ment with the data in Table II, also graphed in the Figure 11 scatter plot, and fit the pro- posed rules for prediction of tin whisker self- mitigation. explanation of scatter plot A scatter plot of the horizontal and vertical lead dimensions versus the tin whisker self-mit- igation status shown in Tables I and II provides a graphical emphasis for the results, as shown in Figure 11. Data points above and to the right of the red line in Figure 11 correspond to test samples that failed to self-mitigate, with solder terminations that contain less than 3 wt% lead, and data points below and to the left of the green line correspond to self-mitigating condi- tions. proposed rules for prediction of tin Whisker self-mitigation 1) The horizontal component of lead length must be less than 0.035 inch, from the tip of the lead at the solder pad back to the lead egress from the package. 2) The combined dimensions of height and length must be less than 0.045 inch. Conclusions The current mitigation processes for tin whisker risk have serious drawbacks, including added processing costs [2] , increased rework costs (removing conformal coatings), added process controls (verifying low stress in tin surfaces [3, 12] ), and risk of damage to components (strip- ping, replating [4] , and solder dipping [13] ). Under certain conditions, surface mount soldering with eutectic tin-lead solder can result in the alloying of plated pure tin component termina- tion finishes with a minimum of 3 wt% lead at no added process cost. We have termed this effect "self-mitigation" despite being a slight misnomer, as having 3 wt% lead is not truly mitigation; it effectively eliminates the risk of tin whisker growth. ArtiCle tIN WHIsKer seLF-mItIGAtION IN surFACe mOuNt COmpONeNts continues Table i: McM component solder termination dimensions and mitigation status. figure 10: Typical chip component solder termi- nations with height (H) and top surface (T2).

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