Issue link: https://iconnect007.uberflip.com/i/594816
82 SMT Magazine • November 2015 • We found examples where the compo- nent manufacturer may declare that the com- ponent conforms to a standard, but in reality some of the dimensions are outside the toler- ances set by the standard. Figure 5 shows one such example where some of the dimensions are outside the limits set by JEDEC. The size of the deviations may be small, but they could be enough to cause DFA violations to slip through into manufacturing; and in any case, a compo- nent is either within tolerance of not. We found that, from a sample of some 20,000 component package models of chip-style components that you would expect to be modeled by JEDEC in the "0402" or "0603" range of categories, ap- proximately 20% were impossible to map cor- rectly to the standard as defined. Therefore, the standards designation is not enough; a full graphical representation of the component and its pins is required. The second prevailing assumption, especial- ly in the design community, is that the library of the PCB layout system should be used for the purpose of DFA. From the standpoint of the STreAmLINING PCb ASSembLy AND TeST NPI WITH SHAreD ComPoNeNT LIbrArIeS arTIcLe figure 3: outsourcing the need for a shared standard for component models. figure 4: formal component-modeling standards do not cover all purchasable parts.