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38 The PCB Design Magazine • January 2016 column by Istvan Novak orACle quIET PoWER How to Design a PDN for the Worst-Case Scenario The target impedance concept implicitly assumes that the largest possible PDN voltage- noise amplitude will be the product of the larg- est PDN-impedance in the relevant frequency range, and the corresponding maximum cur- rent-draw amplitude. Therefore, the maximum noise amplitude presumably could be con- tained below a target level by assuring that the PDN impedance is below a target value at all frequencies. However, it turns out that this assumption is true only if the PDN impedance is flat/uniform across all relevant frequencies. If there is varia- tion of the PDN-impedance with frequency, then the largest PDN voltage-noise amplitude can be much larger than the product of the cur- rent-draw amplitude and the largest PDN im- pedance. In my December 2015 column [1] , we showed that for linear and time invariant (LTI) systems, the reverse pulse technique is a simple, fast, and guaranteed way to obtain the worst- case transient PDN noise (i.e., the maximum- amplitude "rogue wave"). In this column, we will show how the volt- age-noise amplitude can be a function of the number of peaks in the PDN-impedance profile, and of the magnitude of variation in PDN im- pedance between different frequencies. As a starting point, we briefly summarize here what we learned in the previous column. We used a circuit from [2] , shown in Figure 1, with the impedance profile shown in Figure 2. This circuit has three anti-resonance peaks: 67 kHz, 1 MHz and 51 MHz. The resonance peaks all have approximately 100 mOhm impedance magnitudes. These peaks are clearly visible not Figure 1: rogue wave example circuit [2] .

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