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January 2016 • The PCB Design Magazine 41 quiet power HoW To DESIgN A PDN FoR THE WoRST-CASE SCENARIo noise estimate. We get this amount of noise when a positive-going 1A current step is fol- lowed by a 1A negative-going current step with sufficient time between the two current steps so that the response can settle to its steady state before the next step arrives. In contrast, from the straight target-impedance calculations we would expect 100 mV noise. In the worst case, however, when the posi- tive and negative-going 1A current steps can hit the circuit in any arbitrary sequence, the reverse pulse technique in Figure 4 predicts a 391 mVpp maximum noise, more than six times higher than what we get from the peak deviation of the step response. In this column we will look at a few further cases illustrating what happens when we have different degrees of "non-flatness." When we have a linear network, the excita- tions and the impedance profiles can be scaled, so it does not matter what impedance target we use for the illustrations. For the sake of simplic- ity and consistency, we will use a 100 mOhm impedance target and for all examples we will make sure that within the bandwidth of the exci- tation, the impedance does not exceed this limit. Figure 5 shows the impedance profiles of four cases. We start with a single peak at 0.1 Figure 4: Worst-case response simulated with an excitation sequence calculated from the reverse pulse technique. Figure 5: Impedance profiles with one, two, three and four distinct peaks, all reaching exactly 100 mohm values. The top and bottom plots show the same data: In the top chart, we can better see that all four peaks reach exactly 100 mohm values. The bottom chart shows better how the peak frequencies in the four cases relate to each other.