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July 2016 • The PCB Design Magazine 19 that there are three equalization mechanisms applied to the channel: 1. Transmitter feed-forward equalization (FFE). – The FFE is assumed to be a synchronously spaced tapped delay line with linear taps, in which the equalizing taps can occur either before or after the main tap. – It is assumed that the maximum transmit voltage is constant, which is achieved by keeping the transmit swing constant and the sum of the absolute values of the taps equal to one. 2. Receiver continuous time linear equaliza- tion (CTLE). – The CTLE is assumed to have a finite number of configurations which can be chosen through the IBIS-AMI model's input parameter string. – No assumption is made concerning the relationship of one CTLE configuration to another. 3. Receiver decision feedback equalization (DFE). – The DFE is assumed to be a synchronously spaced tapped delay line with linear taps, driven by the detected data. – It is assumed that the detected data is almost always correct. The overall procedure is 1. Define a starting configuration for the transmitter and receiver. 2. Solve for the impulse response of the passive interconnect network. 3. Apply the transmitter IBIS-AMI model to the channel impulse response, resulting in an impulse response at the input of the receiver model. 4. For each CTLE configuration: a. Set the receiver IBIS-AMI model to the selected CTLE configuration and apply the receiver model to the input impulse response. b. Using Hilbert space projection, compute the combination of FFE and DFE taps that will minimize the intersymbol interfer- ence. c. Using Banach space techniques, adjust the FFE and DFE taps to maximize the eye height. d. Record the best eye height, CTLE con- figuration, FFE and DFE tap values. 5. Set the FFE taps in the transmitter IBIS- AMI model to the selected tap values and set the receiver IBIS-AMI model to the selected CTLE configuration. It is assumed that the receiver's DFE will perform its own adaptation. 6. If the FFE tap values have changed signif- icantly since the last time they were set, go back to step 3 and repeat the optimiza- tion algorithm. If the FFE tap values have not changed significantly, execute the sta- tistical analysis in the normal manner. The procedure described was first imple- mented in a simplified form in 2002. While the initial approach was reasonably successful, the subsequent evolution has made the procedure much more complex and introduced a number of subtle details. These details, and the optimal automation of the same, are beyond the scope of this paper. This paper will instead present techniques that system developers can apply manually to a pulse response in a waveform viewer either to obtain an equalization configuration that is close to optimum or to gain insight into the trade-offs that the optimization must address. The empha - sis is on insight rather than automation. The manual procedures to be described in subsequent sections are • Clock recovery: The optimization proce- dure is critically dependent on the position of the recovered clock. An algorithm we call the "hula-hoop" algorithm quickly and accurately determines the average clock timing to be ex- pected from a bang-bang clock recovery loop. • Minimize intersymbol interference: Choose FFE and DFE tap weights that will mini- mize intersymbol interference, and understand how these choices will affect the eye height. • Maximize eye height: Understand how minimizing the intersymbol interference im- proves eye height but does not obtain exactly the maximum eye height. • CTLE vs. FFE trade-offs: The effect of CTLE can be very similar to the effect of FFE, often NEW SI TECHNIQUES FOR LARGE SYSTEM PERFORMANCE TUNING