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44 The PCB Design Magazine • July 2016 sible to model its performance by calculating a 3D solution of Maxwell's equations, which pro- vides an elegant mathematical representation of electromagnetic interactions. The result, all too often, is that large numbers of SI problems are identified at a point relatively late in the de- sign process when changes are very expensive to make. As a general rule, the cost of design changes generally increases by an order of mag- nitude or more as the design moves from con- ceptual to detailed to simulation. SI Checkers use Configurable Rules The latest generation of PCB design solu- tions, such as Zuken's CR-8000, incorporate fea- tures like an SI checker in the form of EMC advi- sor that evaluates the design during the layout process to predict, analyze and control issues that may cause SI or EMC problems. An embed- ded field solver calculates characteristic imped- ance, unit length delays and the mutual induc- tances and capacitances between lines. The SI checker runs as a menu item without requiring external net or components lists, exchange files or translators. Users can configure each rule by assigning specific parameters to nets. This is im- portant because every board design has its own unique tradeoffs between performance, cost and schedule, not to mention corporate culture. The ability to configure rules enables users to take control over the process and adopt the rules to the needs of the specific project. The user can weight rules so that some are con- sidered more and others less important in the overall design rating. The user can also evalu- ate what-if scenarios by changing parameters globally and updating the rule checks. Files are provided to identify potential problems at the earliest stage possible in order to minimize the effects of design changes, reduce overall devel- opment cost, and speed up the design cycle. Common Design Mistakes Shielding: Sensitive circuits such as clock and high-speed signal wiring often require shielding to protect them from nearby radio frequency (RF) fields. As an example, CE test- ing, which is required to sell products in the European Union, for example, typically sub- jects electronic products to a radiated field of 1 V/m to 10 V/m magnitude over a 80 MHz to 6 GHz frequency range. Some industries such as automotive and aerospace are required to with- stand even more difficult tests. This RF energy may couple to sensitive circuits such as clock and high-speed signal wiring and induce volt- ages and currents that can adversely affect its performance. The SI checker inspects shields near applicable signal vias. When the shielded level is below the parameter set by the user, the design feature is called out. The rule checker recommends an appropriate remedy for each fault such as applying an appropriate shielding to the object net patterns, placing appropriate Figure 2: Trace shielding check. GETTING SIGNAL INTEGRITY RIGHT BY DESIGN