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38 The PCB Design Magazine • September 2017 by Hemant Shah and Ed Acheson CADENCE DESIGN SYSTEMS Designers try their best to avoid design for manufacturing (DFM) errors as they lay out the PCB. Experienced designers know common is- sues to look for and fix, saving them the hassle of a board coming back from manufacturing si- gnoff for rework. They know how painful, time consuming, and frustrating it is to fix errors that are discovered by the manufacturing signoff process. Not only must they stop working on the new, important project they just started, but they are also now both the focus and cause of a delay that probably was unaccounted for in the schedule. Design First, Ask Questions Later There is a fundamental problem in the PCB design approach that is used today. Currently, designers hurry up and finish the board, then send to another person or group that uses a dif- ferent tool to check if the design is ready for manufacturing handoff. Is it manufacturable? Will it have a high or low yield? The problem with this approach is that the data is first translated from the native PCB CAD system, and then an intelligent CAD database is recreated. This is essentially a translation process. The industry has gone through many translators and found there is always an inter- pretation gap. Using a third-party tool provides designers with a second set of eyes, but they must contend with translation mismatches, or if one tool supports a new fabrication method, designers must wait for the signoff tool to catch up and support the same methods. The industry has seen this with back-drill- ing, rigid-flex, and embedded components, to name a few such fabrication innovations. Trans- lation and reverse-engineering processes in- volve many assumptions that cause mismatches and can create false positives, or worse, not find problems at all. False positives cause designers to spin their wheels, change something that is not required and hope no new errors get intro- An Ounce of DFM Error Prevention is Worth a Pound of Cure FEATURE