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34 The PCB Design Magazine • November 2017 connections are for the voltage connected to that plane, then essentially the entire area un- der the pinfield will be used for power delivery. DC losses will be all but eliminated. Another benefit of HDI is the reduction in via anti-pad size. Microvias have a much small- er anti-pad than traditional thru-hole vias. The smaller anti-pad size allows for even more cop- per to be available for power delivery. This effect is further enhanced (though not significantly) by removing anti-pads from the plane due to reduced thru vias. The benefits of reduced plane perforation are not limited to DC power delivery. They also affect the AC impedance of the PDN. This includes the effectiveness of the decoupling capacitors as well as the inherent plane capacitance. The web of neckdowns cre- ated by typical anti-pads is high in inductance, which limits the effective frequency range of the decoupling capacitors. The improvement to power delivery by eliminating power and ground plane perforations can be substantial (Figure 3). Mounting Inductance Mounting a capacitor is arguably the most vital element in determining its performance. The inductance of the capacitor is dominated by its mounting. Its series resistance is usually determined by its intrinsic resistance, or ESR, but a poor mounting structure can add series resistance on the same order of the ESR. In fact, poor capacitor mounting can render the capaci- tor almost completely useless for decoupling. The key to effective capacitor mounting is reducing the size of the loop area connecting the capacitor between power and ground. Ide- ally the capacitor would be connected directly between power and ground, but a capacitor is placed on the top (or bottom) of the board and connected to the power planes through vias. The length of those vias and their distance from each other are the most dominant factors in de- termining the capacitor's mounting inductance. Because of this, it is preferred to keep ground and power planes as close to the surface as pos- sible. Keeping ground and power planes on the top layer of the board also facilitates the reduc- tion in plane perforation outlined in the pre- vious section, by allowing power and ground planes to be connected using blind vias or mi- crovias and dramatically reducing the number of anti-pads in the IC pinfield. In addition to the length of via connections, the distance between the two-capacitor mount- ing vias is the other main factor in determin- ing the mounting inductance of the capacitor. The mounting vias should be as close together as possible to minimize the current loop area. That is where using HDI and via-in-pad technol- ogy become quite beneficial, because putting the mounting vias inside each of the capacitor pads positions the vias as close together as pos- sible. In the example in Figure 4, a 0402 0.01μF THE IMPACT OF HDI ON PCB POWER DISTRIBUTION Figure 3: PDN impedance with microvias (lowest), standard blind vias (middle), and no HDI (highest).