Issue link: https://iconnect007.uberflip.com/i/989774
62 SMT007 MAGAZINE I JUNE 2018 rate and would eliminate the need for assem- bly rework. Another focus of the analysis was evaluat- ing the influence of the via design on to the void percentage. The complexity and function- ality of the boards' vias in a PCB are impor- tant components. In this study two types of vias were evaluated: (1) through hole vias and (2) plugged vias. All vias were 0.3 mm diameter. Plugged vias were 0.3 mm diameter through hole vias with 0.5 mm diameter resist on top and bottom. Figure 11 shows the opti- cal profile of the plugged via. It appears that resist had some curvature (depression), which could contribute to increased voiding due to air entrapment. Solder material selection is an important factor when setting up a process for QFN or any other BTC. Voiding is a problem for bottom termination components, especially for QFN packages that have a thermal pad to conduct heat away from the integrated circuit (IC). Excess voiding will increase the ther - mal resistance of the thermal interface. It is common practice to design pad and vias to increase propensity for volatiles to escape during reflow process to minimize voiding under the BTC. X-ray images of the assem - blies built with SPO and PF+paste configura- tions are shown in Figure 12. Again, the same consistency between voiding of the assemblies was observed when PF+paste was exam- ined. For plugged vias, voiding was observed around vias. As it was stated earlier, curva- ture in the solder resist might be contributing factor in higher voiding in the via area. Much lower and smaller voids were observed with PF+paste configuration. Figure 11: Optical image and profile of the surface of the plugged via.