SMT007 Magazine

SMT007-Feb2020

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96 SMT007 MAGAZINE I FEBRUARY 2020 evolved through joint development programs between a number of government and indus- try organizations and technical universities. In addition to these joint development programs, several independent laboratories and package assembly service providers have successfully developed a number of proprietary processes for embedding the uncased bare die elements. Without encroachment into proprietary techni- cal detail, a general overview of process varia- tions can be offered here. Facedown and Face-up Process Variations The semiconductor(s) may be mounted onto a designated layer of the core substrate in a face-up orientation or with the active sur- face facing down. Facedown mounting is typ- ically selected for direct interface to a pattern of mating terminals on the circuit structure's core surface. Semiconductors that are fur- nished with raised alloy terminals will rely on some form of flip-chip attachment pro- cessing. For example, semiconductor die with wire-bond sites greater than 400 microns may be furnished with alloy or conductive poly- mer bump features for termination. However, when the terminal spacing on the die is less than 400 microns, companies may consider implementing a selective plating process to furnish small solid copper pillars. Attaching the semiconductor with the active surface of the die facing up is preferred for wire-bond processing or microvia termination. In preparation for wire-bond termination, a recessed area or cavity is generally provided in the substrate to afford clearance for both die attach and terminal interface. Following the wire-bond process, the cavity will be filled during the subsequent buildup layer lamina- tion procedure. When employing the microvia interface pro- cess, the thinned die element is first bonded onto the surface of the designated core circuit layer. In preparation for microvia termination, the terminal sites on the semiconductor must be furnished with a copper surface. Following the placement and lamination encapsulating the die element, laser systems are employed to Figure 1: Die first coreless assembly process sequence.

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