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JULY 2021 I DESIGN007 MAGAZINE 19 sible, then tune the delay of each signal group to its reference clock. is will ensure that the signals have settled before the data is captured. Key Points • Designing a memory interface is all about timing closure • e velocity of the signal is sped up by the serpentine. e EM wave passes the serpentine section faster than that of a straight trace of the same length • is acceleration is caused by crosstalk coupling (NEXT and FEXT) between the parallel trace segments of the serpentine traces • For long coupled lengths, signals may become distorted as they pass the serpentine section • Signals pass relatively undistorted along short, coupled serpentine sections but distortion begins to occur when the parallel trombone length approaches one-third the signal wavelength • When the round-trip delay of a heavily coupled switchback far exceeds one-third of the rise time, you get seriously distorted signals; when it's much less than one-third, you get advanced timing • Forward crosstalk does not exist in the stripline configuration • Stripline edge coupled signals can also be placed closer to each other compared to the microstrip equivalent • e NEXT distortion for short switch- backs doesn't impact the shape of the rising edge, but it advances the time of arrival • Long, coupled switchbacks also distort the signals and are not recommended DESIGN007 Resources 1. "Beyond Design: Stackup Configurations to Mit- igate Crosstalk," Barry Olney, Design007 Magazine, February 2021. "Serpentine Delays," by Howard Johnson, Signal Consulting Inc. Originally published in EDN Maga- zine, Feb. 5, 2001. Barry Olney is managing director of In-Circuit Design Pty Ltd (iCD), Australia, a PCB design service bureau that specializes in board- level simulation. The company developed the iCD Design Integrity software incorporating the iCD Stackup, PDN, and CPW Planner. The software can be down- loaded at To read past columns or contact Olney, click here. Figure 3: Another poor DDR4 reference design with long switchbacks. Figure 4: Serpentine trace vs. straight trace (microstrip).

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