Issue link: https://iconnect007.uberflip.com/i/1028393
SEPTEMBER 2018 I DESIGN007 MAGAZINE 69 The power-flow drop by 0.5 corresponds to -3 dB, by 0.1 to -10 dB, by 0.01 to -20 dB and so on. We can observe that the maximal power density is uniform around the strip at lower frequencies and concentrates around the strip edges at higher frequencies. As we can also see, the power of the signal drops around the strip rather quickly to -50 dB (by 0.00001 times). We can say that the structure is well localized if there is nothing in the area with the significant power flow (no coupling to the other strips for instance). However, the localization is conditional on homogeneity of dielectric and uniformity of the strips. If such conditions are not satisfied (and they are usually not satisfied for PCB inter- connects—dielectrics are not homogeneous and there are large variations in manufactur- ing), the energy of the quasi-TEM mode can be transformed into the dominant TEM wave of the parallel plate waveguide formed by the top and bottom plane. To avoid it, the stitch- ing vias connecting the planes should be used along the traces at higher frequencies. The distance between the stitching vias should be less than half of wavelength in dielectric at the highest frequency of interest—and that may be a lot of additional vias. The stripline localiza- tion can be easily violated if the equipoten- tiality of the reference planes is not ensured with the stitching vias. The result is the signal energy leak along the trace (observed on TDR as flat or decreasing impedance). Due to the reciprocity it works both ways—the energy of the power distribution network can be coupled to the trace, if it is not localized with the stitch- ing vias. Now let's take a look at the power-flow den- sity in via holes. One of the links on EvR-1 board was designed by Marko Marin with two single-ended vias specifically to test the local- ization importance. One of the vias has two stitching vias at about 30 mils from the signal via, and another has no stitching vias in the vicinity, as shown in Figure 4. This is an example from an award-winning DesignCon 2018 paper the author co-wrote with M. Marin, 40 GHz PCB Interconnect Validation: Expectations vs. Reality [3]. We used the "sink or swim" formula for predictable interconnect Figure 3: The power-flow density of the dominant quasi-TEM mode in stripline at four frequencies. Figure 4: Two vias, one with two stitching vias and one without.