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62 DESIGN007 MAGAZINE I NOVEMBER 2018 shown in Figure 2. The via pairs are arranged on a 0.5-inch grid centered on the board. The corner and center labels mark the test points where I measured and simulated the planes. Test boards with each laminate flavor had two additional subvariants: one with the board and plane edges left open (which is the typi- cal case in our boards), and another with vias along the board edge, shorting the DUT lami- nate. The shorting vias have a center-to-cen- ter spacing of 50 mils. Figure 4 shows photos of the open-edge and shorted-edge 1-mil test boards. These test boards have been measured and simulated in a large number of different config- urations. Figure 3 includes the summary of data referring to two locations: corner and center. For data shown here, I did not attach any component to the boards. Figure 5 shows the measurement setup for the open-edge boards. I used a Keysight E5061B vector network ana- lyzer in two-port shunt-through connection. On the left, you can see the semirigid probes with a red heat-shrink tube, and the full setup on the right. For shorted-edge boards, the setup is the same except I also added a common-mode toroid [2] to reduce the cable-braid error (see Figure 17). The first pass of simulations on the open- edge test boards started with nominal or esti- mated values. The boards were also cross-sec- tioned so that I could use the actual geometry Figure 4: Test boards with 1-mil DUT laminate: (L) open-edge and (R) shorted-edge versions. Due to the tight spacing, the shorting vias along the board edge blend together and look like a trace. Figure 5: Test setup for the open-edge test boards.

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