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58 DESIGN007 MAGAZINE I DECEMBER 2018 Designers are well aware that a shorter cir- cuit path between the individual die elements, the greater the signal transmission speed, which significantly reduces inductance. By embedding the semiconductors on an inner layer directly in line with related semiconduc- tor packages mounted on the outer surface, the conductor interface distance between die ele- ments will be minimized. Terminal Interface The semiconductor fabrication process typi- cally furnishes the die with an aluminum bond pad for the traditional gold-bond interface pro- cess. When alternative interface methods are required, the semiconductor terminals must be furnished with metalization that will be com- patible with the attachment material or inter- face method. Companies using solder or con- ductive polymer for attaching the die element in the facedown orientation, for example, will need to employ techniques that enable liquidus material deposition, a solder reflow process, or a method for thermal curing followed by the dispensing of underfill polymer to negate air from between the die and laminate surface. The underfill material will require further ther- mal and vacuum processes to evacuate any trapped air and complete curing procedure. Bond Pattern Redistribution To enable efficient circuit routing, the semi- conductor elements (while they remain in the wafer-level format) will likely be subject to additional metalization processes to redistrib- ute the closely spaced wire-bond sites on the die perimeter to a more uniform array pattern within the central area of the die. In preparation Embedding Components, Part 6: Preparation for Active Semiconductor Elements Designers Notebook by Vern Solberg, CONSULTANT

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