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68 DESIGN007 MAGAZINE I DECEMBER 2018 a life of coffee stains? Good schematics are good team play. Best Practice Every Time Every day at Sunstone, we get calls from teams that have sent a design in prematurely and need to make a last-minute change. If they get to us in time, we will pull the design back. At the very least, they may lose some produc- tive days fixing and resubmitting the design. We all know that there is a best practice for the work, but we slip from it, often in the effort to save time. In teams that we work with, we want the mindset to be, "I was in a hurry, so I did everything right." What is right? It is start- ing at high-altitude block diagrams, breaking each block into one or more schematic sheets, checking flow and accuracy carefully, and then designing the board. Of course, the engineer and the designer go over the design carefully to make sure that it matches the specifications, right? One would hope so, but busy people on tough deadlines can easily decide to lean on auto - mation tools. Good Designs Need Good Inputs Designers don't read minds—they read sche- matics. Engineers need to make that document as functional as possible. The engineer may understand the locations for all their bypass capacitors implicitly; they end up listed in the corner of one page, but that relies on the designer to interpret that intent and properly place the elements. A more thoughtful engi- neer will locate devices in roughly the manner of the final design to help the designer avoid bad interconnects, placement assumptions, or other errors. In addition, it never hurts to provide explan- atory notes about the elements. We have never heard a designer say that the engineer provided too much guidance for their work. A key ele- ment is to utilize proper naming conventions for connections (i.e., net names). We all know that the automated default labels that our design software provides are far from intuitive. Help the designer avoid embarrassing connec- tion mistakes that will slow the project down by creating—and consistently using—connec- tion labels a human can understand. Working in "Expert Mode" Speaking of interconnects, the designer's job is made easier if they have software on their side. Some engineers—again, often thinking they are too busy for best practices—will do what we call "working in expert mode." They give implicit connections using port symbols for the entire schematic, thereby creating no trail for the designer to follow. While it saves the engineer a couple of minutes, that time is effectively lost while the designer sorts out the nest of connections. The software tracks and confirms those connections for a reason. It may feel like an obstacle for the engineer, but for the overall project, these tools are a lifeline. Use DRC and Resolve Errors Everyone runs the design rule check (DRC), but not everyone actually resolves those errors. It is too frequently used "just for documenta- tion issues" that won't theoretically affect the performance of the board to be left in place. Over time, these errors build up and create a fog of confusion that makes it hard to maintain quality. A team should expect that every build is accompanied by a DRC report that reads "no warnings or violations." Recommendations for Clean Schematics Below are our top six recommendations for clean schematics: 1. Start with a block-level diagram We all know that there is a best practice for the work, but we slip from it, often in the effort to save time.

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