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112 SMT007 MAGAZINE I JULY 2019 cess, and the improved yield after updating the internal specification is as follows: PCB Manufacturing Process 1. Mechanical scrubbing after electroless cop- per plating for nodules was initially imple- mented and slightly improved yields, but later, it was found that the electrolytic cop- per plating tank cleanliness had a more significant impact on yields 2. The cleanliness of the electrolytic copper plating tanks has been maintained through a preventative maintenance schedule to significantly reduce the occurrence of nod- ules 3. Foam trays with slots were implemented to transport the boards after profile routing to reduce the number of scratches Wire Bonding on Nodules and Scratches 1. Type A nodules were the most commonly observed nodules with a height range normally below 10 mm even though the height of two of them were about 13 mm 2. Scratches created intentionally for this study were deeper and wider (as wide as 33 mm) than those inflicted during PCB manufacturing. EDS analysis results showed that the gold layer was mostly removed, but the wire-bondable palladium layer was only partially removed, resulting in the nickel layer only exposed sporadi- cally 3. All of the wire bonds made using the SSB process on nodules and scratches used in this study passed wire-bond pull tests before and after reliability tests of temper- ature and humidity testing and thermal cycling Yield Loss Due to Nodules and Scratches 1. The internal specification was updated to address nodules and scratches on wire- bond surfaces based on the improvements made in PCB manufacturing and the results of this study. Nodules under a specific height and scratches with a certain width depending on the depth of the scratches are allowed in the new specification compared to the original specification, which had a zero tolerance for nodules and scratches 2. The average yield loss of multiple PCB products due to nodules or scratches was significantly reduced to a maximum of approximately 7% from a maximum of approximately 41% Disclaimer This article contains information from Tele- dyne DALSA Inc. and is provided for reference purposes only. The company makes no rep- resentation or warranty, express or implied, regarding the accuracy, completeness, suffi- ciency, or suitability of the information con- tained in this article, or that it is free from any defect or infringement, and the company will not be liable for any use of or reliance upon such information. SMT007 References 1. IPC-A-600, Revision J, "Acceptability of Printed Boards," IPC, 2010. 2. Y. K. Song, V. Bukva, "Challenges on ENEPIG Finished PCBs: Gold Ball Bonding and Pad Metal Lift," IPC APEX EXPO Technical Conference, 2016. 3. MIL-STD-883H, METHOD 2010.12, 2010. This paper was first presented at the IPC APEX EXPO 2019 Technical Conference and published in the 2019 Technical Conference Proceedings. Young K. Song is senior process engineer at Teledyne DALSA Inc., Waterloo, Ontario, Canada. Vanja Bukva is senior vendor quality manager at Teledyne DALSA Inc., Waterloo, Ontario, Canada. Ryan Wong is process engineering manager at FTG Circuits in Toronto, Ontario, Canada.

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