Issue link: https://iconnect007.uberflip.com/i/1140547
JULY 2019 I DESIGN007 MAGAZINE 29 Figure 4 illustrates a dual stripline configu- ration with a combination of edge and broad- side coupling. This occurs when two signal layers are stacked between the planes. Again, this may create crosstalk depending on the trace separation. Crosstalk can be reduced by routing the signal traces orthogonally on adja- cent layers reducing the couple to just a small area. However, as frequencies and rise times increase, this is not a good solution. Fortunately, synchronous buses—as typical- ly used for parallel data signal transfer—ben- efit from an extraordinary immunity to cross- talk. Crosstalk only occurs when the signals are being switched, and this crosstalk only has an impact within a small window around the moment of the clocking. Providing the receiver waits sufficiently long enough for the crosstalk to settle before sampling the bus, the crosstalk has no impact on the signal quality at the re- ceiver. I typically use the dual-stripline con- figuration for the DDRx address, command, and control signals, which are far less critical than the data lanes. But generally, each sig- nal layer should be adjacent to—and closely coupled to—an uninterrupted reference plane, which creates a clear return path and elimi- nates broadside crosstalk. Figure 5 shows a typical six-layer PCB stack- up, but here, I am using the signal layers for mixed-signal/plane pours to eliminate the im- pact of the electromagnetic fields coupling. These days, it is quite common to have 10 or more power supplies on a board. Rather than allocating one or two per plane, it is best to use the dual stripline layers to provide mixed- signal/power pours. It is a bit hard to visualize this in the spreadsheet format; however, Fig- ure 6 illustrates the point clearly. Layers 3 and 4 can be used for critical signals but are sepa- rated by a power pour on either side (L–R: dif- ferential pair, broadside-coupled pair, coupling between unrelated signals). This gives the PCB designer flexibility, adds planar capacitance, and provides plenty of room for multiple sup- plies. An advantage of using high layer count boards is that power and grounds planes can be placed closely together (2–5 mils) to pro- vide high-frequency planar capacitance. Above Figure 4: Dual stripline configuration (edge and broadside coupled). Figure 5: A six-layer stackup top/bottom microstrip and middle dual stripline. (Source: iCD Stackup Planner)