Design007 Magazine

Design007-Feb2020

Issue link: https://iconnect007.uberflip.com/i/1210212

Contents of this Issue

Navigation

Page 42 of 107

FEBRUARY 2020 I DESIGN007 MAGAZINE 43 materials (ECM) are becoming a cost-effective solution for improved power integrity. This technology provides an effective approach for decoupling high-performance ICs whilst also reducing electromagnetic emissions. Embedded capacitance technology has a very thin dielectric material (0.24–2.0 mils) sandwiched between two copper planes that produce distributive decoupling capacitance and takes the place of conventional discrete decoupling capacitors over 1 GHz (Figure 4). Unfortunately, standard decoupling capacitors have little effect over 1 GHz, and the only way to reduce the impedance of the PDN above this frequency is to use ECM or alternatively on-die capacitance. These ultra-thin laminates replace the conventional power and ground planes and should be positioned in the stackup close to and directly below/above the IC. This re- duces the loop inductance dramatically. With a capacitance density of up to 20 nF per square this cavity can pick up this transient voltage as crosstalk. The more switching signals that pass through the cavity, the more noise is induced into other signals; it affects vias all over the cavity, not just the ones in close proximity to the aggressor sig- nal vias. This cavity noise propagates as stand- ing waves spreading across the entire plane pair. This is the primary mechanism by which high- frequency noise is injected into cavities: by sig- nals transitioning through cavities, using each plane successively as the signal return path. If the plane cavity is not dampened, then elec- tromagnetic fields can radiate from the board (as in Figure 2). However, when optimized, the PDN can mitigate many potential EMI issues and help prevent EMC certification test fail- ures. How do we effectively dampen the plane cavity? With the continuous trends to smaller feature sizes and faster signal speeds, planar capacitor laminate, and embedded capacitor Figure 3: Typical PDN topology. Figure 4: Embedded capacitance dramatically reduces inductance.

Articles in this issue

Archives of this issue

view archives of Design007 Magazine - Design007-Feb2020