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24 DESIGN007 MAGAZINE I JULY 2020 designs. The routing fans out from the driver through a series resistor for each load. This reduces reflections. The delay for each leg is then matched for each load. For clock lines with multiple receivers, it is best to route to the receiver that is the farthest from the driver first, and then match that delay when routing to the other receivers. Clock signals generally have a fast rise time and hence are noisy due to high harmonic con- tent; as a result, they must be isolated from the rest of the circuitry. To reduce the impact of a noisy clock circuit, it is good practice to locate the clock circuitry in the center of the PCB and star route out to the loads in precise patterns and at a specific delay. The electromagnetic fields surrounding a microstrip (outer layer) trace exist partially within the dielectric material(s) and partially within the surrounding air. Since air has a dielectric constant of one, which is always lower than that of FR-4 and solder mask (typi- cally 4.3 and 3.3, respectively), mixing a lit- tle air into the equation will lower the effec- tive dielectric constant and speed up the sig- nal propagation. Even if the trace widths are adjusted on each layer, as the impedance is identical, the propagation speed of microstrip is always faster than stripline—typically by 13–17%. The speed of propagation of digital signals is independent of trace geometry and impedance but reliant on the dielectric constant of the materials. Therefore, if a signal changes layers in the stackup, then the delay will also vary. If you are aware of this issue, then the trace delays (Figure 1) can be matched to compen- sate for the varying flight time so that at the nominal temperature, all signals running on either microstrip or stripline will arrive at the receiver simultaneously. PCB designers should always match delays—not length. Before starting placement and routing, detailed interconnect routing constraints should be established. These constraints— based on pre-layout simulation, manufacturing restrictions, and IC manufacturer's recommen- dations and guidelines—will control the place- Figure 1: Relative signal propagation of microstrip and stripline (simulated in iCD Design Integrity).

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