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JUNE 2020 I PCB007 MAGAZINE 63 Figure 11: Another new vertical panel processing system is the cleanroom MultiPlate targeted for redistribution layer (RDL) and wafer pillar applications as well as advanced pattern-plated embedded components and SAP and WLP panels. Figure 12: SAP is required for metallization and the creation of geometries down to 8 μm. Depending on finished L/S capabilities, pattern-plating is also required. MVF and pillar structures using dedicated RDL and Pillar Atotech chemistries. The MultiPlate series has been in develop- ment for many years with the assistance of the semiconductor industry. It has been refined and evolved from earlier experimental ma- chines. The targeted applications of both new verti- cal products and the related Atotech processes are shown in Figures 12 and 13.