Issue link: https://iconnect007.uberflip.com/i/1285883
24 DESIGN007 MAGAZINE I SEPTEMBER 2020 But the geometrically limited heat spread in i2 and bottom impairs the temperature level. The rectangular pattern of red dots below U1 in the bottom layer is the PTH. They roughly show the temperature level of the component, not because they dissipate heat well, but because they dissipate it poorly and because the heat is in a dead-end. If the heat dissipation were good, the outer ring would have to be much colder. The one via in the upper left corner is an exception and is a customized construction on the bottom. 4. ISL8240MEVAL4: Comparison With Observation Since there are infrared images and an article (Taranovich, 2015) [8] for the ISL8240MEVAL4Z [9] assembly, it is suitable for comparison with the simulation. The layout was created with Cadence Allegro [10] . The compari- son of simulation and experiment is very satisfactory (see details of the model [11] ). Not only the maxi- mum temperature is properly cal- culated, but also the edges and ridges caused by the layout of the inner layers are in their correct posi- tion. By the way, the "standard" method [12] is the wrong approach here (Figure 9). Final Thoughts Temperature also affects the electrical conductivity of the traces and the overall performance of the components ("derating") and the final product. (We inten- tionally omitted electric heating of traces in this article; see Doug Brooks' article in this issue. High- current applications in high ambi- ent temperature can also be simu- lated with TRM, also as a mission profile with a time sequence of switching states). Early confi- dence that the components and traces will meet the temperature limits is one of the hallmarks of serious product development. As the person responsible for heat dissipa- tion, you can use the resulting graphs and tables (virtual thermographs) to clearly illus- trate which actions are to be taken (or not) and why. Do not just believe that it will work out; you just have to want it and realize that good thermal design is cost-free. Even a proto- type costs more money than just ordering the PCB sample online, and many bugged proto- types cost too much. Our plea as a software provider is, of course, that thermal management should be accompanied by numerical simulation and that this should set the parameters for good solutions. But thermal management is also an interdisciplinary task because both the specifications and the solutions come from different directions. There is no panacea, and often, the development department is Figure 8. Calculated thermographs from the EVB-USB580X_A model superimposed on the layout images. The top layer (above) and bottom layer (below). The heat dissipation by PTH is poor.