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84 DESIGN007 MAGAZINE I NOVEMBER 2020 To deal with the increase in circuit intercon- nections required, manufacturers began to increasingly use vias, which interconnected to one or more internal layers, as well as internal or buried vias, which were created in the circuit layers before the lamination process to make a multilayer board. At the same time, there was a possibility to make both blind and "semi- buried/semi-blind" vias, which extended from the surface to a subsurface layer but not all the way through. Mechanical drilling was still the most common way to make the via hole at this time, but lasers were poised to take over the task as they were and are much better suited to making very small holes, and they dominate the process to this day. The early 1990s saw the arrival of area array components in both larger BGA and much smaller CSP formats. They were devel- oped to accommodate the increasing demand for I/O while holding the line on the size of the PCB for cost and performance reasons. This development precipitated a big increase in via technology and the introduction of new ways of creating them, including bur- ied bump interconnection technology (BBIT) developed by Toshiba and any layer inter- stitial via hole (ALIVH) developed by Pana- sonic (Figure 2). These technologies require a license and thus have not enjoyed the breadth of use of more traditional and generic plated via technolo- gies. Both of these novel techniques involved the use of the conductive paste to make the via connection from layer to layer. The BBIT (also called B2IT) process was unique in that it involved sequential stenciling of conductive paste in the form of a pattern of cones, which pierced the bond ply used to join circuit layers during lamination. With an ever-increasing I/O count and reduced contact pitch, micro vias (nominally less than 75 mm in diameter) have been increasingly called upon to mitigate the wiring congestion in today's most advanced designs. Over time, the microvias are often being stacked sequentially in a buildup process. This approach has been called to question from a reliability perspective; an alternative where all the holes in the laminate at one time. That was in the 1950s, and it is still the basic tech- nology used today for through-holes and vias. Increases in performance demand improved and standardized components in the late 1960s and 1970s, such as the dual in-line package (DIP), along with increased circuit complex- ity, led to the development of multilayer PCBs. And vias were used not only to make the con- nection from side to side to connect the DIPs and other discrete components but also to interconnect circuit runs routed through the inner layers of the multilayer board along with making the connection to internal power and ground planes. Connection to the thin ring of copper exposed on the wall of the drilled hole was again made by electroless and electrolytic copper plating. It served not only to make connections to com- ponent leads but to increasingly important vias. Because vias did not need to hold a com- ponent lead, they could be made smaller. This helped to reduce the board space required as well while improving performance. However, it was becoming increasingly evident that leaded components not only required greater space as I/O counts increased, but the larger size lim- ited the effective performance of the electronic device. This ushered in the era of surface-mount technology in the 1980s, where component leads were first placed on the edges of the component body and mounted on the surface of the PCB. The newer components were tem- porarily attached by means of a solder paste stenciled to the land pattern and subsequently soldered to the matching land pattern using a high-temperature reflow oven to affix them permanently. SMT components and technol- ogy allowed for a significant reduction in the size of electronics while allowing an increase in the lead count due to the finer pitch of the component's leads. SMT largely made possible the era of portable electronics, which holds true to this day. It also drove advances in via design and manufacture but also caused con- cern about the reliability of the solder joints and plated interconnections due to the heat of the soldering process.

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