Issue link: https://iconnect007.uberflip.com/i/1350598
50 PCB007 MAGAZINE I MARCH 2021 As the via structures that interconnect com- ponents and layers in a PCB are typically the weak point in a conductive circuit, testing re- quirements have rapidly evolved, attempting to assess the process survivability, robustness, and reliability of via structures. Process survivability, reliability testing, and robustness testing are terms that tend to be confused with each other and lumped into "re- liability testing." Let's clarify these terms and show how they fit together into the PCB world so that it is clearly understood what it means when each is used. Process Survivability Process survivability testing is the simu- lation of the environmental stresses experi- enced by the PCB during the component at- tachment process including any repair or re- work that might be allowed prior to the prod- uct going into use in the field. is means that a representative test sample must be subject- ed to multiple exposures of the test tempera- tures utilized for component attachment and rework/repair processes. As this represents what could happen to a PCB during compo- nent attachment, process survivability simu- lation should be performed prior to any reli- ability or robustness testing. e IPC recent- ly published IPC-TM-650 2.6.27B that defines assembly reflow process survivability testing for via structures. is test method defines the testing of via resistance during the simulation of a convection reflow oven environment. e results of this testing will allow understanding of whether the vias can survive the multiple re- flow/rework/repair processes that are allowed during component attachment. An extension of this test is also sometimes used as a robust- ness test where reflow simulation cycles are re- peated until via structure failure. Reliability Testing Reliability testing is the process of creat- ing an environment for test samples that sig- nificantly accelerates the factors influencing a PCB's performance during its expected life. e results from testing in this environmental acceleration can be evaluated using mathemat- ical models (Weibull, etc.) in order to predict the expected life of the product in the field. Re- liability testing attempts to maximize accelera- tion factors actually seen by the product dur- ing its life and eliminate acceleration factors that cannot be directly correlated to real life use. In order to assess the long-term reliability of via structures, thermal shock/cycling is per- formed on test samples in accordance with IPC-TM-650 method 2.6.7.2 between -55°C to (T g - 10)°C. Keeping the upper temperature to which the samples are exposed to 10°C be- low the T g ensures that the expansion rate of the material is consistent with what is expect- ed during the life of the PCB. e resistance of single vias or daisy-chains of vias is monitored during thermal shock/cycling and resistance increases over time are indicative of cracking or separation in the via structure(s). When assessing the long-term reliability of a PCB's insulation system, testing for con- ductive anodic filaments (CAF) in accordance with IPC-TM-650 method 2.6.25 is normal- ly performed. is testing exposes parallel via structures to 85°C and 85% RH environment while placing a 100 VDC potential across them. Electric vehicle electronic systems oen run at voltages well above 100 V and variations of CAF testing up to 4000 VDC have been done at my lab, Microtek Laboratories China (www. eTestLab.cn). ere is no standard for CAF testing at voltages above 100 VDC and custom fixtures, cabling and safety systems must be de- ployed to properly perform high-voltage CAF testing. Robustness Testing Robustness testing is essentially reliability and/or survivability testing plus. e plus in- cludes environmental or electrical acceleration factors that cannot be directly correlated to the factors that influence a PCB's long-term